Photo of Mary Jane (Janie) Irwin

Mary Jane (Janie) Irwin

Emeritus Robert Knoll Professor of Computer Science and Engineering

Affiliation(s):

  • School of Electrical Engineering and Computer Science
  • Computer Science and Engineering
  • Electrical Engineering

348C Information Sciences and Technology Building

mji@psu.edu

814-865-1802

Personal or Departmental Website

Research Areas:

Interest Areas:

Computer architecture, VLSI systems design, embedded and mobile computing systems design, electronic design automation

 
 

 

Education

Publications

Book, Chapters

  • Soumya Eachempati, Aman Gayasen, Vijaykrishnan Narayanan and Mary Jane Irwin, 2011, Leveraging Emerging Technology Through Architectural Exploration for the Routing Fabric of Future FPGAs, Springer New York, pp. 189-213
  • Aditya Yanamandra, Soumya Eachempati, Vijaykrishnan Narayanan and Mary Jane Irwin, 2010, Reliability Aware Performance and Power Optimization in DVFS-Based On-Chip Networks, IGI Global, pp. 277-292
  • N. Vijaykrishnan, Mary Jane Irwin, M. Kandemir, L. Li, G. Chen and B. T. Kang, 2005, Designing Energy-aware Sensor Systems, CRC Press, pp. 653-666
  • H. Saputra, N. Vijaykrishnan, M. Kandemir, R. Brooks and Mary Jane Irwin, 2005, An Energy-aware Approach for Sensor Data Communication, CRC Press, pp. 697-720
  • I. Kadayif, M. Kandemir, A. Choudhary, M. Karakoy, N. Vijaykrishnan and Mary Jane Irwin, 2005, Compiler-directed Communication Energy Optimizations for Microsensor Networks, CRC Press, pp. 711-734
  • T. Theocharides, G. Link, N. Vijaykrishnan and Mary Jane Irwin, 2005, Networks on Chip: Interconnects for the Next Generation Systems on Chip, pp. 35-89
  • Mary Jane Irwin, L. Benini, N. Vijaykrishnan and M. Kandemir, 2004, Techniques for Designing Energy-aware MPSoCs, pp. Ch. 2, 21-47
  • I. Kadayif, M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and I. Kolcu, 2004, Reducing Energy Consumption in Chip Multiprocessors using Workload Variation, pp. 123-140
  • M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2002, Compiler Optimizations for Low-Power Systems, Kluwer Academic/Plenum Publishers, pp. 191-210
  • N. Vijaykrishnan, M. Kandemir, A. Sivasubramaniam and Mary Jane Irwin, 2002, Tools and Techniques for Integrated Hardware-Software Energy Optimizations, Kluwer Academic Publishers, pp. 277-295
  • H. S. Kim, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2001, Characterization of Memory Energy Behavior, Kluwer Academic, pp. 165-180

Parts of Book

  • V. Degalahal, R. Ramanarayanan, N. Vijaykrishnan, Y. Xie and Mary Jane Irwin, 2006, Effect of Power Optimizations on Soft Error Rate

Journal Articles

  • Hsiang-Yun Cheng, Mary Jane Irwin and Yuan Xie, 2015, "Adaptive Burst-Writes (ABW): Memory Requests Scheduling to ReduceWrite-Induced Interference", ACM Trans. Design Autom. Electr. Syst. (TODAES), 21, (1), pp. 7
  • Hsiang-Yun Cheng, Matt Poremba, Narges Shahidi, Ivan Stalev, Mary Jane Irwin, Mahmut T Kandemir, Jack Sampson and Yuan Xie, 2015, "EECache: A Comprehensive Study on the Architectural Design for Energy-EfficientLast-Level Caches in Chip Multiprocessors", ACM Trans. on Arch. Code Opt. (TACO), 12, (2), pp. 17
  • Ravindhiran Mukundrajan, Matthew Cotter, Sungmin Bae, Vinay Saripalli, Mary Jane Irwin, Suman Datta and Vijaykrishnan Narayanan, 2013, "Design of energy-efficient circuits and systems using tunnel fieldeffect transistors", IET Circuits, Devices & Systems, 7, (5), pp. 294–303
  • S. Rawat, P. Balsara and Mary Jane Irwin, 2013, "Design of fast pipelined arithmetic units in VLSI", Journal of Indian Institute of Science, 67, ((11&12))
  • Cihangir Çelik, Kenan Ünlü, Vijaykrishnan Narayanan and Mary Jane Irwin, 2011, "Soft error modeling and analysis of the Neutron Intercepting Silicon Chip (NISC)", Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 652, (1), pp. 370 - 373
  • Cihangir Çelik, Kenan Ünlü, Vijaykrishnan Narayanan and Mary Jane Irwin, 2011, "Cosmic ray background effects on the neutron intercepting silicon chip (NISC)", Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 652, (1), pp. 338 - 341
  • Guiling Wang, Mary Jane Irwin, Haoying Fu, Piotr Berman, Wensheng Zhang and Thomas F Laporta, 2011, "Optimizing sensor movement planning for energy efficiency", TOSN, 7, (4), pp. 33
  • Mary Jane Irwin, 2010, "Technology scaling redirects main memories: technical perspective", Communications of the ACM, 53, (7), pp. 98
  • Chrysostomos Nicopoulos, Suresh Srinivasan, Aditya Yanamandra, Dongkook Park, Vijaykrishnan Narayanan, Chitaranjan Das and Mary Jane Irwin, 2010, "On the Effects of Process Variation in Network-on-Chip Architectures", IEEE Trans. Dependable Sec. Comput., 7, (3), pp. 240–254
  • Wei-Lun Hung, Yuan Xie, Vijaykrishnan Narayanan, Mahmut T Kandemir and Mary Jane Irwin, 2010, "Total Power Optimization for Combinational Logic Using Genetic Algorithms", Signal Processing Systems, 58, (2), pp. 145–160
  • Ozcan Ozturk, Mahmut T Kandemir and Mary Jane Irwin, 2010, "On-chip memory space partitioning for chip multiprocessors using polyhedral algebra", IET Computers & Digital Techniques, 4, (6), pp. 484–498
  • Y. Ding, M. Kandemir, P. Raghavan and Mary Jane Irwin, 2009, "Adapting Application Execution in CMPs Using Helper Threads", Journal of Parallel and Distributed Computing, 69, (9), pp. 790-806
  • M. Mutyam, F. Wang, R. Krishnan, N. Vijaykrishnan, M. Kandemir, Y. Xie and Mary Jane Irwin, 2009, "Process-Variation-Aware Adaptive Cache Architecture and Management", IEEE Transactions on Computers, 58, (7), pp. 865-877
  • J. Hu, F. Li, V. Degalahal, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2009, "Compiler-assisted Soft Error Detection under Performance and Energy Constraints in Embedded Systems", ACM Transactions on Embedded Computing Systems, 8, (4), pp. 30
  • O. Ozturk, M. Kandemir and Mary Jane Irwin, 2009, "Using Data Compression for Increasing Memory System Utilization", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 28, (6), pp. 901-914
  • R. Ramanaryanan, V. Degalahal, R. Krishnan, J. S. Kim, N. Vijaykrishnan, Y. Xie and Mary Jane Irwin, 2009, "Modeling Soft Errors at the Device and Logic Levels for Combinatorial Circuits", IEEE Transactions on Dependable and Secure Computing, 6, (3), pp. 202-216
  • C. Celik, K. Unlu, K. Ramakrishnan, R. Rajaraman, N. Vijaykrishnan, Mary Jane Irwin and Y. Xie, 2008, "Thermal Neutron Induced Soft Error Rate Measurement in Semiconductor Memories and Circuits", Journal of Radioanalytical and Nuclear Chemistry, 278, (2), pp. 509-512
  • Y. Tsai, F. Wang, Y. Xie, N. Vijaykrishnan and Mary Jane Irwin, 2008, "Design Space Exploration for Three-Dimensional Cache", IEEE Transactions on VLSI, 16, (4), pp. 444-445
  • S. Srinivasan, N. Vijaykrishnan, R. Krishnan, P. Mangalagiri, Y. Xie, K. Sarpatwari and Mary Jane Irwin, 2008, "Toward Increasing FPGA Lifetime", IEEE Transactions on Dependable and Secure Computing, 5, (2), pp. 115-127
  • Y. Xie, L. Li, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2007, "Reliability-Aware Co-synthesis for Embedded Systems", Journal of VLSI Signal Processing, 49, (1), pp. 87-99
  • F. Wang, M. Debole, X. Wu, Y. Xie, N. Vijaykrishnan and Mary Jane Irwin, 2007, "On-chip Bus Thermal Analysis and Optimization", IET Computer & Digital Techniques, 1, (5), pp. 590-599
  • S. Kim, N. Vijaykrishnan and Mary Jane Irwin, 2007, "Reducing Non-Deterministic Loads in Low-Power Caches via Early Cache Set Resolution", Microprocessors and Microsystems, 31, (5), pp. 293-301
  • K. Unlu, N. Vijaykrishnan, S. M. Cetiner, V. Degalahal and Mary Jane Irwin, 2007, "Neturon-induced Soft Error Rate Measurements in Semiconductor Memories", Nuclear Instructions & Methods in Physics Research, pp. 252-255
  • W. Zhang, Y.-F. Tsai, D. Duarte, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2006, "Reducing Dynamic and Leakage Energy in VLIW Architectures.", TACM Transactions on Embedded Computing Systems, 5, (1), pp. 1-28
  • J. Lee, N. Vijaykrishnan and Mary Jane Irwin, 2006, "Block-Based Frequency Scalable Technique for Efficient Hierarchical Coding", IEEE Transactions on Signal Processing, 54, (7), pp. 2559-2566
  • G. Chen, M. Kandemir, Mary Jane Irwin and J. Ramanujam, 2006, "Reducing Code Size Through Address Register Assignment", ACM Transactions on Embedded Computing (TECS), 5, (1), pp. 225-258
  • J. Lee, N. Vijaykrishnan and Mary Jane Irwin, 2006, "Efficient VLSI Implementation of Inverse Discrete Cosine Transform", IEEE Transactions on Circuits and Systems for Video Technology, 16, (5), pp. 655-662
  • I. Kadayif, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2005, "An Integer Linear Programming Based Tool for Wireless Sensor Networks", Journal of Parallel and Distributed Computing (JPDC), 65, (3), pp. 247-260
  • S. Kim, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2005, "Optimizing Leakage Energy Consumption in Cache Bitlines", Journal of Design Automation for Embedded Systems (DAEM), 9, (1), pp. 5-18
  • J. Hu, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2005, "Analyzing Data Reuse for Cache Reconfiguration", ACM Transactions on Embedded Computer Systems (TECS), 4, (4), pp. 851-876
  • E. J. Kim, G. Link, K. H. Yum, N. Vijaykrishnan, M. Kandemir, Mary Jane Irwin and C. R. Das, 2005, "A Holistic Approach to Designing Energy-efficient Cluster Interconnects", IEEE Transactions on Computers, 54, (6), pp. 660-671
  • W. Zhang, Y.-F. Tsai, M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and V. De, 2005, "Leakage-Aware Compilation for VLIW Architectectures", IEE Proceedings: Computers and Digital Techniques, 152, (2), pp. 251-260
  • S. Kim, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2005, "Exploiting Temporal Loads for Low Latency and High Bandwidth Memory", IEE Proceedings: Computers and Digital Techniques, 152, (4), pp. 455-457
  • V. Degalahal, L. Li, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2005, "Soft Error Issues in Low Power Caches", IEEE Transactions on VLSI, 13, (10), pp. 1157-1166
  • S. Mourali, T. Theocharides, L. Benini, G. DeMicheli, N. Vijaykrishnan and Mary Jane Irwin, 2005, "Analysis of Error Recovery Schemes for Networks-On-Chips", IEEE Design and Test of Computers, Special Issue on Networks on Chips, 22, (5), pp. 434-442
  • I. Kadayif, M. Kandemir, G. Chen, N. Vijaykrishnan, Mary Jane Irwin and A. Sivasubramaniam, 2005, "Compiler-directed High-level Energy Estimation and Optimization", ACM Transactions on Embedded Computing Systems (TECS), 4, (4), pp. 819-850
  • M. Kandemir, Mary Jane Irwin, G. Chen and I. Kolcu, 2005, "Compiler-Guided Leakage Optimization for Banked Scratch-Pad Memories", IEEE Transactions on VLSI, 13, (10), pp. 1136-1146
  • S. Kim, S. Tomar, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2004, "Energy-Efficient Java Execution Using Local Memory and Object Co-location", IEE Proceedings: Computers and Digital Techniques, 151, (1), pp. 33-42
  • M. Kandemir, J. Ramanujam, Mary Jane Irwin, N. Vijaykrishnan, I. Kadayif and A. Parikh, 2004, "A Compiler-Based Approach for Dynamically Managing Scratch-pad Memories in Embedded Systems", IEEE Transactions on Computer Aided Design, 23, (2), pp. 243-260
  • W. Zhang, J. S. Hu, V. Degalahal, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2004, "Reducing Instruction Cache Energy Consumption using a Compiler Based Strategy", ACM Transactions on Architecture and Code Optimization (TACO), 1, (1), pp. 3-33
  • A. Parikh, S. Kim, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2004, "Instruction Scheduling for Low Power", Journal of VLSI Signal Processing Systems, 37, (1), pp. 129-149
  • G. Chen, B. T. Kang, M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and R. Chandramouli, 2004, "Studying Energy Tradeoffs in Off-loading Computation/Compilation in Java-enabled Mobile Devices", IEEE Transactions on Parallel and Distributed Systems (TPDS), 15, (9), pp. 795-809
  • Y.-F. Tsai, D. Duarte, N. Vijaykrishnan and Mary Jane Irwin, 2004, "Characterization and Modeling of Leakage Reduction Techniques", IEEE Transactions on Very Large Scale Integration Systems, 12, (11), pp. 1221-1233
  • N. Vijaykrishnan, M. Kandemir, Mary Jane Irwin, H. Kim and W. Ye, 2003, "Evaluating Integrated Hardware-Software Optimizations Using a Unified Energy Estimation Framework", IEEE Transactions on Computers, 52, (1), pp. 59-76
  • L. Li, I. Kadayif, Y.-F. Tsai, N. Vijaykrishnan, M. Kandemir, Mary Jane Irwin and A. Sivasubramaniam, 2003, "Managing Leakage Energy in Cache Hierarchies", Journal of Instruction-level Parallelism, 5
  • S. Kim, N. Vijaykrishnan, M. Kandemir, A. Sivasubramaniam and Mary Jane Irwin, 2003, "Partitioned Instruction Cache Architecture For Energy Efficiency", ACM Transactions on Embedded Computing Systems: Special Issue on Compilers, Architecture, and Synthesis for Embedded Systems, 2, (2), pp. 163-185
  • H. Saputra, N. Vijaykrishnan, M. Kandemir, Mary Jane Irwin, R. Brooks, S. Kim and W. Zhang, 2003, "Masking the Energy Behavior of Encryption Algorithms", IEE Proceedings: Computers and Digital Techniques, 150, (5), pp. 274-284
  • N. Kim, T. Austin, D. Blaauw, T. Mudge, K. Flautner, J. S. Hu, Mary Jane Irwin, M. Kandemir and N. Vijaykrishnan, 2003, "Leakage Current: Moore's Law Meets Static Power", IEEE Computer, Special Issue on Power- and Temperature-Aware Computing, 36, (12), pp. 68-75
  • G. Chen, M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and W. Wolf, 2002, "Using Memory Compression for Energy Reduction in an Embedded Java System", Journal of Circuits, Systems and Computers, 11, (5), pp. 537-556
  • G. Chen, M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and M. Wolczko, 2002, "Tuning Garbage Collection for Reducing Memory System Energy in an Embedded Java Environment", ACM Transactions on Embedded Computer Systems, 1, (1), pp. 27-55
  • N. An, S. Gurumurthi, A. Sivasubramaniam, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2002, "Energy-Performance Trade-Offs for Spatial Access Methods on Memory-Resident Data", International Journal on Very Large Databases, 11, (3), pp. 179-197
  • D. Duarte, N. Vijaykrishnan and Mary Jane Irwin, 2002, "A Clock Power Model to Evaluate Impact of Architectural and Technology Optimizations", IEEE Transactions on VLSI, 10, (6), pp. 844-855
  • R. Y. Chen, Mary Jane Irwin and R. Bajwa, 2001, "Architecture-Level Power Estimation and Design Experiments", ACM Transactions on Design Automation of Electronic Systems (TODAES), 6, (1), pp. 50-66
  • B. Bishop, V. Lyuboslavsky, N. Vijaykrishnan and Mary Jane Irwin, 2001, "Design Considerations for Databus Charge Recovery", IEEE Transactions on Very Large Scale Integration Systems, 9, (1), pp. 104-106
  • G. Esakkimuthu, H. S. Kim, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2001, "Investigating Memory System Energy Behavior Using Software and Hardware Optimizations", Special Issue in Low Power System Design of VLSI DESIGN, 12, (2), pp. 151-165
  • V. De La Luz, M. Kandemir, N. Vijaykrishnan, A. Sivasubramaniam and Mary Jane Irwin, 2001, "Hardware and Software Techniques for Controlling DRAM Power Modes", IEEE Transactions on Computers, Special Issue on Advances in High Performance Memory Systems, 50, (11), pp. 1154-1173
  • M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and W. Ye, 2001, "Influence of Compiler Optimizations on System Power", IEEE Transactions on VLSI Systems, 9, (6), pp. 801-804
  • Mary Jane Irwin, M. Kandemir and N. Vijaykrishnan, 2001, "SimplePower: A Cycle-Accurate Energy Simulator", IEEE Technical Committee on Computer Architecture (TCCA) Newsletter, pp. 59-64
  • E. Gayles, T. Kelliher, R. M. Owens and Mary Jane Irwin, 2000, "The Design of the MGAP-2: A Micro-Grained Massively Parallel Array", IEEE Transactions on VLSI Systems, 8, (6), pp. 709-716

Conference Proceedings

  • H Y Cheng, J. Zhao, John Sampson, Mary Jane Irwin, A. Jaleel, Y. Lu and Y. Xie, 2016, "LAP: Loop-Block Aware Inclusion Properties for Energy-Efficient Asymmetric Last Level Caches", Institute of Electrical and Electronics Engineers Inc., pp. 103-114
  • M F Chang, C. H Chuang, Y. N. Chiang, S. S. Sheu, C. C. Kuo, Y. H. Cheng, John Sampson and Mary Jane Irwin, 2016, "Designs of emerging memory based non-volatile TCAM for Internet-of-Things (IoT) and big-data processing: A 5T2R universal cell", Institute of Electrical and Electronics Engineers Inc., 2016-July, pp. 1142-1145
  • Hsiang-Yun Cheng, Jia Zhan, Jishen Zhao, Yuan Xie, Jack Sampson and Mary Jane Irwin, 2015, "Core vs. uncore: the heart of darkness", pp. 121:1–121:6
  • Hui Zhao, Mahmut T Kandemir and Mary Jane Irwin, 2015, "TaPEr: tackling power emergencies in the dark silicon era by exploiting resource scalability", ACM, pp. 16
  • Mi Sun Park, Omesh Tickoo, Vijaykrishnan Narayanan, Mary Jane Irwin and Ravi Iyer, 2015, "Platform-aware dynamic configuration support for efficient text processing on heterogeneous system", ACM, pp. 1503–1508
  • H.-Y. Cheng, M. Poremba, I. Stalev, Mary Jane Irwin, John Sampson and Yuan Xie, 2015, "Energy-efficient inclusion properties for STT-RAM last-level caches"
  • Hsiang-Yun Cheng, Matthew Poremba, Narges Shahidi, Ivan Stalev, Mary Jane Irwin, Mahmut T Kandemir, John Sampson and Yuan Xie, 2014, "EECache: exploiting design choices in energy-efficient last-levelcaches for chip multiprocessors", pp. 303–306
  • Wei Ding, Jun Liu, Mahmut T Kandemir and Mary Jane Irwin, 2013, "Reshaping cache misses to improve row-buffer locality in multicore systems", pp. 235–244
  • Mi Sun Park, Chuanjun Zhang, Michael Vincent Debole, S. Kestur, Vijaykrishnan Narayanan and Mary Jane Irwin, 2013, "Accelerators for biologically-inspired attention and recognition", pp. 1-6
  • Ravindhiran Mukundrajan, Matthew Cotter, Vinay Saripalli, Mary Jane Irwin, Suman Datta and Vijaykrishnan Narayanan, 2012, "Ultra Low Power Circuit Design Using Tunnel FETs", pp. 153–158
  • Akbar Sharifi, Shekhar Srikantaiah, Mahmut T Kandemir and Mary Jane Irwin, 2012, "Courteous cache sharing: being nice to others in capacity management", pp. 678–687
  • Hui Zhao, Ohyoung Jang, Wei Ding, Yuanrui Zhang, Mahmut T Kandemir and Mary Jane Irwin, 2012, "A hybrid NoC design for cache coherence optimization for chip multiprocessors", pp. 834–842
  • Mi Sun Park, Srinidhi Kestur, Jagdish Sabarad, Vijaykrishnan Narayanan and Mary Jane Irwin, 2012, "An FPGA-based accelerator for cortical object classification", pp. 691–696
  • Wei Wang, Tanima Dey, Ryan W. Moore, Mahmut Aktasoglu, Bruce R. Childers, Jack W. Davidson, Mary Jane Irwin, Mahmut T Kandemir and Mary Lou Soffa, 2012, "REEact: a customizable virtual execution manager for multicore platforms", pp. 27–38
  • Hui Zhao, Mahmut T Kandemir, Wei Ding and Mary Jane Irwin, 2011, "Exploring heterogeneous NoC design space", pp. 787–793
  • Hui Zhao, Mahmut T Kandemir and Mary Jane Irwin, 2011, "Exploring performance-power tradeoffs in providing reliability forNoC-based MPSoCs", pp. 495–501
  • Shekhar Srikantaiah, Emre Kultursay, Tao Zhang, Mahmut T Kandemir, Mary Jane Irwin and Yuan Xie, 2011, "MorphCache: A Reconfigurable Adaptive Multi-level Cache hierarchy", pp. 231–242
  • Mary Jane Irwin, 2010, "Shared caches in multicores: the good, the bad, and the ugly", pp. 234
  • Mahmut T Kandemir, Taylan Yemliha, Sai Prashanth Muralidhara, Shekhar Srikantaiah, Mary Jane Irwin and Yuanrui Zhang, 2010, "Cache topology aware computation mapping for multicores", pp. 74–85
  • Ozcan Ozturk, Mahmut T Kandemir, Mary Jane Irwin and Sri Hari Krishna Narayanan, 2010, "Compiler directed network-on-chip reliability enhancement for chipmultiprocessors", pp. 85–94
  • Yang Ding, Mahmut T Kandemir, Mary Jane Irwin and Padma Raghavan, 2010, "Dynamic core partitioning for energy efficiency", pp. 1–8
  • Konrad Malkowski, Padma Raghavan, Mahmut T Kandemir and Mary Jane Irwin, 2010, "T-NUCA - a novel approach to non-uniform access latency cache architecturesfor 3D CMPs", pp. 1–8
  • Aditya Yanamandra, Soumya Eachempati, Niranjan Soundararajan, Vijaykrishnan Narayanan, Mary Jane Irwin and Ramakrishnan Krishnan, 2010, "Optimizing power and performance for reliable on-chip networks", pp. 431–436
  • J. Ouyang, G. Sun, Y. Chen, L. Duan, T. Zhang, Y. Xie and Mary Jane Irwin, 2009, "Arithmetic Unit Design Using 180nm TSV-based 3D Stacking Technology", Proceedings of the IEEE International 3D Systems Integration Conference (3DIC 2009), pp. 4
  • Y. Xie, S. Eachempati, A. Yanamandra, N. Vijaykrishnan and Mary Jane Irwin, 2009, "Power and Area Reduction using Carbon Nanotube Bundle Interconnect in Global Clock Tree Distribution Network", Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2009), pp. 51-56
  • A. Yanamandra, Mary Jane Irwin, N. Vijaykrishnan, M. Kandemir and S. H. K. Narayanan, 2009, "In-Network Caching for Chip Multiprocessors", Springer-Verlag LNCS, 5409, pp. 373-388
  • Y. Ding, M. Kandemir, Mary Jane Irwin and P. Raghavan, 2009, "Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors", Springer-Verlag LNCS, 5409, pp. 231-247
  • T. Yemliha, S. Srikantaiah, M. Kandemir, M. Karakoy and Mary Jane Irwin, 2008, "Integrated Code and Data Placement in Two-Dimensional Mesh Based Chip Multiprocessors", Proceedings of the ACM/IEEE 2008 International Conference on Computer-Aided Design (ICCAD 2008), pp. 583-588
  • M. Kandemir, F. Li, Mary Jane Irwin and S. W. Son, 2008, "A Novel Migration-based NUCA Design for Chip Multiprocessors", Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC'08), pp. 12
  • F. Li, M. Kandemir and Mary Jane Irwin, 2008, "Implementation and Evaluation of a Migration-based NUCA Design for Chip Multiprocessors", Proceedings of the International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS 2008), pp. 449-450
  • N. Soundararajan, A. Yanamandra, C. Nicopoulos, N. Vijaykrishnan, A. Sivasubramaniam and Mary Jane Irwin, 2008, "Analysis and Solutions to Issue Queue Process Variation", Proceedings of the Thirty-Eighth Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2008), pp. 11-21
  • P. Mangalagiri, K. Sarpatwari, A. Yanamandra, N. Vijaykrishnan, Y. Xie, Mary Jane Irwin and O. A. Karim, 2008, "A low-power Phase Change Memory Based Hybrid Cache Architecture", Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI 2008), pp. 395-398
  • P. Raghavan, M. Kandemir, Mary Jane Irwin and K. Malkowski, 2008, "Managing Power, Performance and Reliability Trade-offs", Proceedings of the Next Generation Software (NGS) Workshop, in conjunctions with IPDPS 2008, pp. 5
  • B. Cover, A. Yanamandra, P. Raghavan, Mary Jane Irwin and M. Kandemir, 2008, "Evaluating the Role of Scratchpad Memories in Chip Multiprocessors for Sparse Matrix Computations", Proceedings of the Twenty-Second IEEE International Parallel and Distributed Processing Symposium (IPDPS 2008), pp. 10
  • Y. Ding, M. Kandemir, P. Raghavan and Mary Jane Irwin, 2008, "A Helper Thread Based EDP Reduction Scheme for Adapting Application Execution in CMPs", Proceedings of the Twenty-Second IEEE International Parallel and Distributed Processing Symposium (IPDPS 2008)
  • S. Srikantaiah, M. Kandemir and Mary Jane Irwin, 2008, "Adaptive Set-Pinning: Managing Shared Caches in Chip Multiprocessors", Proceedings of Thirteenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2008), pp. 135-144
  • A. Yanamandra, B. Cover, P. Raghavan, Mary Jane Irwin, M. Kandemir and K. Malkowski, 2007, "Evaluating the Role of Scratchpad Memories in Multi-cores for Sparse Matrix Computations", Proceedings of the 2007 Supercomputing Conference (SC 2007), pp. 2
  • A. Mupid, M. Mutyam, N. Vijaykrishnan, Y. Xie and Mary Jane Irwin, 2007, "Variation Analysis of CAM Cells", Proceedings of the Eighth International Symposium on Quality Electronic Design (ISQED 2007), pp. 333-338
  • K. Malkowski, G. Link, P. Raghavan and Mary Jane Irwin, 2007, "Load Miss Prediction - Exploiting Power Performance Trade-offs", Proceedings of the Third Workshop on High-Performance, Power-Aware Computing (HP-PAC 2007), in conjunction with IPDPS 2007, pp. 8
  • S. Conner, S. Akioka, G. Link, P. Raghavan and Mary Jane Irwin, 2007, "Modeling of Link Shutdown Opportunities During Collective Communication Primitives in 3-D Torus Nets", Proceedings of the Twenty-First IEEE International Parallel and Distributed Processing Symposium (IPDPS 2007), pp. 8
  • K. Malkowski, P. Raghavan and Mary Jane Irwin, 2007, "Memory Optimizations for Fast Power-Aware Sparse Computations", Proceedings of the Next Generation Software Workshop, in conjunction with IPDPS 2007, pp. 8
  • R. Krishnan, R. Ramanarayanan, S. Srinivasan, N. Vijaykrishnan, Y. Xie and Mary Jane Irwin, 2007, "Variation Impact on SER of Combinational Circuits", Proceedings of the International Society for Quality Electronic Design (ISQED 2007), pp. 911-916
  • Y. Ding, M. Kandemir, P. Raghavan and Mary Jane Irwin, 2007, "Adapting Application Execution to Reduced CPU Availability", Proceedings of the Eleventh Annual Workshop on the Interaction Between Compilers and Computer Architecture (Interact-11), pp. 24-31
  • B. Vaidyanathan, W. Hung, F. Wang, Y. Xie, N. Vijaykrishnan and Mary Jane Irwin, 2007, "Architecting Microprocessor Components in 3D Design Space", Proceedings of the Twentieth International Conference on VLSI Design, pp. 6
  • G. Chen, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2006, "Object Duplication for Improving Reliability", Proceedings of the Eleventh Asia and South Pacific Design Automation Conference (ASP-DAC 2006), pp. 140-145
  • R. Ramanarayanan, J. S. Kim, N. Vijaykrishnan, Y. Xie and Mary Jane Irwin, 2006, "SEAT-LA: A Soft Error Analysis tool for Combinational Logic", Proceedings of the Nineteenth International Conference on VLSI Design, pp. 499-502
  • T. Theocharides, N. Vijaykrishnan and Mary Jane Irwin, 2006, "A Parallel Architecture for Hardware Face Detection", TProceedings of the IEEE Computer Society Annual Symposium on VLSI Design (ISVLSI 2006), pp. 452-453
  • F. Wang, Y. Xie, N. Vijaykrishnan and Mary Jane Irwin, 2006, "On-chip Bus Thermal Analysis and Optimization", Proceedings of the Design, Automation and Test in Europe Conference (DATE 2006), pp. 850-855
  • A. J. Ricketts, K. Irick, N. Vijaykrishnan and Mary Jane Irwin, 2006, "Priority Scheduling in Digital Microfluidics-Based Biochips", Proceedings of the Design, Automation and Test in Europe Conference (DATE 2006), pp. 329-335
  • W.-L. Hung, G. Link, Y. Xie, N. Vijaykrishnan and Mary Jane Irwin, 2006, "Interconnect and Thermal-aware Floorplanning for 3D Microprocessors", Proceedings of the Seventh International Symposium on Quality Electronic Design (ISQED 2006), pp. 98-104
  • R. Ramanarayanan, R. Krishnan, N. Vijaykrishnan, Y. Xie and Mary Jane Irwin, 2006, "Temperature and Voltage Scaling Effects on Electrical Masking", Proceedings of the Second Workshop on System Effects of Logic Soft Errors (SELSE 2006), pp. 4
  • S. Akioka, K. Malkowski, P. Raghavan, Mary Jane Irwin, L. C. McInnes and B. Norris, 2006, "Characterizing the Performance and Energy Attributes of Scientific Simulations", Springer-Verlag LNCS, 3991, (1), pp. 242-249
  • M. Mutyam, F. Li, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2006, "Compiler-Directed Thermal Management for VLIW Functional Units", Proceedings of the ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2006), pp. 163-172
  • O. Ozturk, M. Kandemir, Mary Jane Irwin and S. Tosun, 2006, "Multi-level On-chip Memory Hierarchy Design for Embedded Chip Multiprocessors", Proceedings of the Twelfth International Conference on Parallel and Distributed Systems (ICPADS'06), pp. 383-390
  • C. Liu, A. Sivasubramaniam, M. Kandemir and Mary Jane Irwin, 2006, "Enhancing L2 Organization for CMPs with a Center Cell", Proceedings of the Twentieth IEEE International Parallel and Distributed Processing Symposium (IPDPS'06), pp. 1-10
  • T. Theocharides, G. Link, N. Vijaykrishnan and Mary Jane Irwin, 2005, "Implementing LDPC Decoding on Network on Chip", Proceedings of the Eighteenth International Conference on VLSI Design, pp. 134-137
  • Y.-F. Tsai, N. Vijaykrishnan, Mary Jane Irwin and Y. Xie, 2005, "Influence of Leakage Reduction Techniques on Delay/Leakage Uncertainty", Proceedings of the Eighteenth International Conference on VLSI Design, pp. 374-379
  • K. Irick, W. Xu, N. Vijaykrishnan and Mary Jane Irwin, 2005, "A Nanosensor Array Based VLSI Gas Discriminator", Proceedings of the Eighteenth International Conference on VLSI Design, pp. 241-248
  • W.-L. Hung, Y. Xie, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2005, "Thermal-Aware Allocation and Scheduling for Systems-on-a-Chip Design", Proceedings of the Design, Automation, and Test in Europe (DATE 2005), pp. 898-899
  • Y.-F. Tsai, N. Vijaykrishnan, Y. Xie and Mary Jane Irwin, 2005, "Leakage-Aware Interconnect for On-Chip Network", Proceedings of the Design, Automation, and Test in Europe (DATE 2005), pp. 230-231
  • J. Hu, F. Li, V. Degalahal, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2005, "Compiler-directed Instruction Duplication for Soft Error Detection", Proceedings of the Design, Automation, and Test in Europe (DATE 2005), pp. 1056-1057
  • W.-L. Hung, Y. Xie, N. Vijaykrishnan, C. Addo-Quaye, T. Theocharides and Mary Jane Irwin, 2005, "Thermal-Aware Floorplanning Using Genetic Algorithms", Proceedings of the Sixth International Symposium on Quality Electronic Design (ISQED 2005), pp. 634-639
  • G. Chen, M. Kandemir and Mary Jane Irwin, 2005, "Compiler-directed Selective Data Protection Against Soft Errors", Proceedings of the Asia South Pacific Design Automation Conference (ASP-DAC 2005), pp. 713-716
  • O. Ozturk, M. Kandemir, G. Chen and Mary Jane Irwin, 2005, "Customized On-chip Memories for Embedded Chip Multiprocessors", Proceedings of the Asia South Pacific Design Automation Conference (ASP-DAC 2005), pp. 743-748
  • C. Liu, A. Sivasubramaniam, M. Kandemir and Mary Jane Irwin, 2005, "Exploiting Barriers to Optimize Power Consumption of CMPs", Proceedings of the International Parallel Distributed Processing Symposium (IPDPS 2005), pp. 5a
  • O. Ozturk, M. Kandemir and Mary Jane Irwin, 2005, "Using Data Compression in an MPSoC Architecture for Improving Performance", Proceedings of ACM Great Lakes Symposium on VLSI (GLSVLSI 2005), pp. 353-356
  • O. Ozturk, M. Kandemir and Mary Jane Irwin, 2005, "BB-GC: Basic-block Level Garbage Collection", Proceedings of the Design, Automation, and Test in Europe (DATE 2005), pp. 1032-1037
  • J. Lee, N. Vijaykrishnan and Mary Jane Irwin, 2005, "High Performance Array Processor for Video Decoding", Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI '05), pp. 28-33
  • S. Akioka, S. Kennedy, K. Malkowski, Mary Jane Irwin, P. Raghavan, L. Curfman McInnes and B. Norris, 2005, "Co-Managing Performance and Power for High-Performance Scientific Computing", Proceedings of the ACM/IEEE Conference on Supercomputing (SC 2005)
  • P. Raghavan, Mary Jane Irwin, L. C. McInnes and B. Norris, 2005, "Adaptive Software for Scientific Computing: Co-Managing Quality-Performance-Power Tradeoffs", Proceedings of the NSF Next Generation Software Workshop, in conjunction with IPDPS 2005, 11, (11), pp. 220b
  • Y.-F. Tsai, Y. Xie, N. Vijaykrishnan and Mary Jane Irwin, 2005, "Three-dimensional cache design using 3DCacti", Proceedings of the IEEE International Conference on Computer Design (ICCD 2005), pp. 519-524
  • G. Chen, M. Kandemir and Mary Jane Irwin, 2005, "Exploiting Frequent Field Values in Java Objects for Reducing Heap Memory Requirements", Proceedings of the First ACM/USENIX Conference on Virtual Execution Environments (VEE '05), pp. 68-78
  • A. Gayasen, N. Vijaykrishnan and Mary Jane Irwin, 2005, "Exploring Technology Alternatives for Nano-Scale FPGA Interconnects", Proceedings of the Forty-Second Design Automation Conference (DAC '05), pp. 921-926
  • G. Wang, Mary Jane Irwin, P. Berman, T. Fu and T. F. La Porta, 2005, "Optimizing Sensor Movement Planning for Energy Efficiency", Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED 2005), pp. 215-220
  • O. Ozturk, M. Kandemir and Mary Jane Irwin, 2005, "On-Chip Memory Management for Embedded MpSoC Architectures Based on Data Compression", Proceedings of the IEEE International SoC Conference (SOCC 2005), pp. 175-178
  • W. Hung, C. Addo-Quaye, T. Theocharides, Y. Xie, N. Vijaykrishnan and Mary Jane Irwin, 2004, "Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture", Proceedings of the International Conference on Computer Design (ICCD 2004), pp. 430-437
  • J. Lee, N. Vijaykrishnan, Mary Jane Irwin and R. Radhakrishnan, 2004, "Inverse Discrete Cosine Transform Architecture Exploiting Sparseness and Symmetry Properties", Proceedings of the IEEE Workshop on Signal Processing Systems (SiPS'04), pp. 361-366
  • G. Chen, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2004, "Field-level Analysis for Heap Space Optimization in Embedded Java", Proceedings of the International Symposium on Memory Management (ISMM'04), pp. 131-142
  • T. Theocharides, G. Link, N. Vijaykrishnan, Mary Jane Irwin and W. Wolf, 2004, "Embedded Hardware Face Detection", Proceedings of the Seventeenth International Conference on VLSI Design, pp. 133-138
  • M. Derenzo, Mary Jane Irwin and N. Vijaykrishnan, 2004, "Designing Leakage-Aware Multipliers", Proceedings of the Seventeenth International Conference on VLSI Design, pp. 654-657
  • J. Lee, N. Vijaykrishnan, Mary Jane Irwin and W. Wolf, 2004, "An Architecture for Motion Estimation in the Transform Domain", Proceedings of the Seventeenth International Conference on VLSI Design, pp. 1077-1082
  • J. S. Hu, N. Vijaykrishnan and Mary Jane Irwin, 2004, "Exploring Wakeup-Free Instruction Scheduling", Proceedings of the Tenth International Symposium on High Performance Computer Architecture (HPCA-10), pp. 232-243
  • L. Li, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2004, "A Crosstalk Aware Interconnect with Variable Cycle Transmission", Proceedings of the Design Automation and Test in Europe Conference (DATE'04), 1, pp. 10102-10107
  • J. S. Hu, N. Vijaykrishnan, S. Kim, M. Kandemir and Mary Jane Irwin, 2004, "Scheduling Reusable Instructions for Power Reduction", Proceedings of the Design Automation and Test in Europe Conference (DATE'04), 1, pp. 10148-10155
  • I. Kadayif, I. Kolcu, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2004, "Exploiting Processor Workload Heterogeneity for Reducing Energy Consumption in Chip Multiprocessor", Proceedings of the Design Automation and Test in Europe Conference (DATE'04), 2, pp. 1158-1163
  • M. Pirreti, G. Link, R. Brooks, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2004, "Fault-tolerant Algorithms for Network-on-chip Interconnect", Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), pp. 46-51
  • T. Theocharides, G. Link, E. Swankoski, N. Vijaykrishnan, Mary Jane Irwin and H. Schmit, 2004, "Evaluating Alternative Implementations for LDPC Decoder Check Node Function", Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), pp. 77-82
  • A. Gayasen, Y. Tsai, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2004, "Reducing Leakage Energy in FPGAs Using Region-constrained Placement", Proceedings of the ACM International Symposium on Field-Programmable Gate Arrays (FPGA'04), pp. 51-58
  • V. Degalahal, R. Ramanarayanan, N. Vijaykrishnan, Y. Xie and Mary Jane Irwin, 2004, "The Effect of Threshold Voltages on the Soft Error Rate", Proceedings of the Fifth International Symposium on Quality Electronic Design (ISQED 2004), pp. 503-508
  • E. Swankoski, R. Brooks, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2004, "A Parallel Architecture for Secure FPGA Symmetric Encryption", Proceedings of the Eleventh Reconfigurable Architectures Workshop (RAW 2004), pp. p. 132b
  • W. Xu, N. Vijaykrishnan, Y. Xie and Mary Jane Irwin, 2004, "Design of a Nanosensor Array Architecture", Proceedings of the 2004 Great Lakes Symposium on VLSI (GLSVLSI 2004), pp. 298-303
  • O. Ozturk, M. Kandemir, Mary Jane Irwin and I. Kolcu, 2004, "Tuning Data Replication for Improving Behavior of MPSoC Applications", Proceedings of the 2004 Great Lakes Symposium on VLSI (GLSVLSI'04), pp. 170-173
  • J. Lee, N. Vijaykrishnan and Mary Jane Irwin, 2004, "Efficient VLSI Implementation of Inverse Discrete Cosine Transform", Proceedings of the International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2004), pp. 177-180
  • Y.-F. Tsai, D. Duarte, N. Vijaykrishnan and Mary Jane Irwin, 2004, "Impact of Process Scaling on the Efficacy of Leakage Reduction Scheme", Proceedings of the International Conference on IC Design and Technology (ICICDT 2004), pp. 3-11
  • O. Ozturk, M. Kandemir, I. Demirkiran, G. Chen and Mary Jane Irwin, 2004, "Data Compression for Improving SPM Behavior", Proceedings of the Forty-First Design Automation Conference (DAC'04), pp. 401-406
  • H. Saputra, G. Chen, R. Brooks, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2004, "Code Protection for Resrouce-constrained Embedded Devices", Proceedings of the ACM SIGPLAN/SIGBED 2004 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES '04), pp. 240-248
  • L. Li, V. Degalahal, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2004, "Soft Error and Energy Consumption Interactions: A Data Cache Perspective", Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED 2004), pp. 132-137
  • W. Hung, Y. Xie, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2004, "Total Power Optimization Through Simultaneously Multiple-VDD Multiple-VTH Assignment and Device Sizing With Stack Forcing", Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED 2004), pp. 144-149
  • A. Gayasen, K. Lee, N. Vijaykrishnan, M. Kandemir, Mary Jane Irwin and T. Tuan, 2004, "A Dual Vdd Low-power FPGA Architecture", Proceedings of the International Conference on Field-programmable Logic and Its Applications (FPL'04), pp. 145-157
  • V. De La Luz, M. Kandemir, A. Sivasubramaniam and Mary Jane Irwin, 2004, "Exploring the Possibility of Operating in the Compressed Domain", Proceedings of the International Conference on Parallel and Distributed Computing (Euro-Par'04), 3149, (1), pp. 507-515
  • M. Kandemir, O. Ozturk, Mary Jane Irwin and I. Kolcu, 2004, "Using Data Compression to Increase Energy Savings in Multi-bank Memories", Proceedings of the International Conference on Parallel and Distributed Computing (Euro-Par'04), 3149, (1), pp. 310-317
  • G. Chen, M. Kandemir, N. Vijaykrishnan, A. Sivasubramaniam and Mary Jane Irwin, 2004, "Analyzing Object Error Behavior in Embedded JVM Environments", Proceedings of the IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis (CODES+ISSS'04), pp. 230-235
  • T. Theocharides, G. Link, N. Vijaykrishnan, Mary Jane Irwin and V. Srikantam, 2004, "A Generic Reconfigurable Neural Network Architecture Implemented as a Network on Chip", Proceedings of the IEEE International Systems-on-Chip Conference (SOCC 2004), pp. 191-194
  • B. T. Kang, N. Vijaykrishnan, Mary Jane Irwin and T. Theocharides, 2004, "Power-Efficient Implementation of Turbo Decoder in SDR Systems", Proceedings of the IEEE International Systems-on-Chip Conference (SOCC 2004), pp. 119-122
  • G. Chen, M. Kandemir, N. Vijaykrishnan, A. Sivasubramaniam and Mary Jane Irwin, 2004, "Analyzing Object Error Behavior in Embedded JVM Environments", Proceedings of the IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis (CODES+ISSS'04), pp. 230-235
  • Y. Xie, L. Li, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2004, "Reliability-aware Cosynthesis for Embedded Systems", Proceedings of the Fifteenth IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP'04), pp. 41-50
  • B. T. Kang, N. Vijaykrishnan and Mary Jane Irwin, 2004, "Analyzing Software Influences on Substrate Noise: An ADC Perspective", Proceedings of the International Conference on Computer Aided Design (ICCAD-2004), pp. 916-922
  • S. Srinivasan, A. Gayasen, N. Vijaykrishnan, M. Kandemir, Y. Xie and Mary Jane Irwin, 2004, "Improving Soft-error Tolerance of FPGA Configuration Bits", Proceedings of the International Conference on Computer Aided Design (ICCAD-2004), pp. 107-110
  • M. Kandemir, Mary Jane Irwin, G. Chen and I. Kolcu, 2004, "Banked Scratch-pad Memory Management for Reducing Leakage Energy Consumption", Proceedings of the International Conference on Computer Aided Design (ICCAD-2004), pp. 120-124
  • K. Unlu, V. Degalahal, M. S. Cetiner, N. Vijaykrishnan and Mary Jane Irwin, 2004, "Testing Neutron-Included Soft Errors in Semiconductors", Proceedings of the American Nuclear Society Winter Meeting, pp. 825-826
  • V. Degalahal, N. Vijaykrishnan and Mary Jane Irwin, 2003, "Analyzing Soft Errors in Leakage Optimized SRAM Designs", Proceedings of the Sixteenth International Conference on VLSI Design, pp. 539-545
  • J. S. Hu, N. Vijaykrishnan, Mary Jane Irwin and M. Kandemir, 2003, "Using Dynamic Branch Behavior for Power-Efficient Instruction Fetch", Proceedings of the IEEE Annual Symposium on VLSI (ISVLSI'03), pp. 127-132
  • S. Gurumurthi, J. Zhang, A. Sivasubramaniam, M. Kandemir, H. Franke, N. Vijaykrishnan and Mary Jane Irwin, 2003, "Interplay of Energy and Performance for Disk Arrays Running Transaction Processing Workloads", Proceedings of the International Symposium on Performance Analysis of Systems and Software (ISPASS'03), pp. 123-132
  • H. Saputra, N. Vijaykrishnan, M. Kandemir, Mary Jane Irwin, R. Brooks, S. Kim and W. Zhang, 2003, "Masking the Energy Behavior of DES Encryption", Proceedings of International Conference on Design Automation and Test in Europe (DATE 2003), pp. 10084-10089
  • W. Zhang, M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and V. De, 2003, "Compiler Support for Reducing Leakage Energy Consumption", Proceedings of International Conference on Design Automation and Test in Europe (DATE 2003), pp. 11146-11147
  • M. Kandemir, Mary Jane Irwin, G. Chen and J. Ramanujam, 2003, "Address Register Assignment for Reducing Code Size", Proceedings of the Twelfth International Conference on Compiler Construction (CC'03), 2622, pp. 273-289
  • S. Gurumurthi, N. An, A. Sivasubramaniam, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2003, "Energy and Performance Considerations in Work Partitioning for Mobile Spatial Queries", Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS 2003)
  • G. Chen, B. T. Kang, M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and R. Chandramouli, 2003, "Energy-Aware Compilation and Execution in Java-Enabled Mobile Devices", Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS 2003)
  • Y.-F. Tsai, D. Duarte, N. Vijaykrishnan and Mary Jane Irwin, 2003, "Implications of Technology Scaling on Leakage Reduction Techniques", Proceedings of the Fortieth Design Automation Conference, pp. 187-190
  • H. S. Kim, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2003, "Adapting Instruction Level Parallelism for Optimizing Leakage in VLIW Architectures", Proceedings of the Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES'03), pp. 275-283
  • A. Bhatkar, R. Chandramouli, N. Vijaykrishnan and Mary Jane Irwin, 2003, "Computation and Transmission Energy Modeling Through Profiling for MPEG4 Video Transmission", Proceedings of the IEEE International Conference on Multimedia & Expo (ICME 2003), 1, pp. 281-284
  • H. S. Kim, N. Vijaykrishnan, M. Kandemir, E. Brockmeyer, F. Catthoor and Mary Jane Irwin, 2003, "Estimating Influence of Data Layout Optimizations on SDRAM Energy Consumption", Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED'03), pp. 40-43
  • J. Hu, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2003, "Exploiting Program Hotspots and Code Sequentiality for Instruction Cache Leakage Management", Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED'03), pp. 402-407
  • E. J. Kim, K. H. Yum, G. Link, N. Vijaykrishnan, M. Kandemir, Mary Jane Irwin and C. R. Das, 2003, "Energy Optimization Techniques in Cluster Interconnects", Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED'03), pp. 459-464
  • S. Kim, N. Vijaykrishnan, Mary Jane Irwin and L. K. John, 2003, "On Load Latency in Low-Power Caches", Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED'03), pp. 258-261
  • H. Saputra, N. Vijaykrishnan, M. Kandemir, R. Brooks and Mary Jane Irwin, 2003, "Exploiting Value Locality for Secure Energy Aware Communication", Proceedings of the IEEE Workshop on Signal Processing Systems (SIPS'03), pp. 116-121
  • J. Lee, N. Vijaykrishnan, Mary Jane Irwin and R. Chandramouli, 2003, "An Efficient Implementation of Hierarchical Image Coding", Proceedings of the IEEE Workshop on Signal Processing Systems (SIPS'03), pp. 363-368
  • L. Li, N. Vijaykrishnan, M. Kandemir, Mary Jane Irwin and I. Kadayif, 2003, "CCC: Crossbar Connected Caches for Reducing Energy", Proceedings of the Euromicro Symposium on Digital System Design (DSD'2003), pp. 41-48
  • G. Chen, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2003, "Energy-aware Code Cache Management for Memory-constrained Java Devices", Proceedings of the IEEE International SOC Conference (ASIC/SOC'03), pp. 179-182
  • R. Ramanarayanan, V. Degalahal, N. Vijaykrishnan, Mary Jane Irwin and D. Duarte, 2003, "Analysis of Soft-Error Rate for Flip-Flops and Scannable Latches", Proceedings of the IEEE International SOC Conference (ASIC/SOC'03), pp. 231-234
  • B. T. Kang, N. Vijaykrishnan, Mary Jane Irwin and D. Duarte, 2003, "Substrate Noise Detector for Noise Tolerant Mixed-Signal IC", Proceedings of the IEEE International SOC Conference (ASIC/SOC'03), pp. 279-280
  • D. Duarte, N. Vijaykrishnan and Mary Jane Irwin, 2003, "Energy and Timing Characterization of VLSI Charge-pump Phase-locked Loops", Proceedings of the IEEE International SOC Conference (ASIC/SOC'03), pp. 341-344
  • A. Hegde, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2003, "VL-CDRAM: Variable Line Sized Cached DRAMs", Proceedings of the CODES-ISSS Merged Conference (CODES/ISSS'03), pp. 132-137
  • G. Chen, N. Vijaykrishnan, M. Kandemir, Mary Jane Irwin and M. Wolczko, 2003, "Tracking Object Life Cycle for Leakage Energy Optimization", Proceedings of the CODES-ISSS Merged Conference (CODES/ISSS'03), pp. 213-218
  • V. De La Luz, M. Kandemir, G. Chen, Mary Jane Irwin and I. Kolcu, 2003, "Energy-conscious Memory Allocation and Deallocation for Pointer-intensive Applications", Proceedings of the Third International Conference on Embedded Software (EMSOFT'03), pp. 156-172
  • V. De La Luz, A. Sivasubramaniam, M. Kandemir, Mary Jane Irwin and N. Vijaykrishnan, 2003, "Reducing dTLB Energy Through Dynamic Resizing", Proceedings of the Twenty-First International Conference on Computer Design (ICCD), pp. 358-363
  • G. Chen, M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin, B. Mathiske and M. Wolczko, 2003, "Heap Compression for Memory-constrained Java Environments", Proceedings of the Eighteenth Annual ACM SIGPLAN Conference on Object-Oriented Programming, Systems, Languages, and Applications (OOPSLA'03), pp. 282-301
  • U. Sezer, G. Chen, M. Kandemir, H. Saputra and Mary Jane Irwin, 2003, "Exploiting Bank Locality in Multi-bank Memories", Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES '03), pp. 287-297
  • W. Zhang, M. Kandemir, A. Sivasubramaniam and Mary Jane Irwin, 2003, "Performance, Energy, and Reliability Tradeoffs in Replicating Hot Cache Lines", Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES '03), pp. 309-317
  • L. Li, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2003, "Adaptive Error Protection for Energy Efficiency", Proceedings of the International Conference on Computer Aided Design (ICCAD-2003), pp. 2-7
  • V. De La Luz, M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin, A. Sivasubramaniam and I. Kolcu, 2002, "Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories", Proceedings of the Seventh Asia and South Pacific Design Automation Conference (ASPDAC '02) and the Fifteenth International Conference on VLSI Design (VLSI Design 2002), pp. 288-293
  • D. Duarte, Y.-F. Tsai, N. Vijaykrishnan and Mary Jane Irwin, 2002, "Evaluating Run-Time Techniques for Leakage Power Reduction", Proceedings of the Seventh Asia and South Pacific Design Automation Conference (ASPDAC '02) and the Fifteenth International Conference on VLSI Design (VLSI Design 2002), pp. 31-38
  • G. Chen, R. Shetty, M. Kandemir, Mary Jane Irwin, N. Vijaykrishnan and M. Wolczko, 2002, "Tuning Garbage Collection in an Embedded Java Environment", Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA-8), pp. 92-103
  • S. Gurumurthi, A. Sivasubramaniam, Mary Jane Irwin, N. Vijaykrishnan, M. Kandemir, T. Li and L. K. John, 2002, "Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach", Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA-8), pp. 141-150
  • I. Kadayif, M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and A. Sivasubramaniam, 2002, "EAC: A Compiler Framework for High-Level Energy Estimation and Optimization", Proceedings of the International Conference on Design Automation and Test in Europe (DATE 2002), pp. 436-442
  • J. Hu, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2002, "Power-Efficient Trace Caches", Proceedings of International Conference on Design Automation and Test in Europe (DATE 2002), pp. p. 1091
  • D. Duarte, N. Vijaykrishnan and Mary Jane Irwin, 2002, "A Complete Phase-Locked Loop Power Consumption Model", Proceedings of International Conference on Design Automation and Test in Europe (DATE 2002), pp. p. 1108
  • I. Kadayif, N. Orr, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2002, "Instruction Selection/Scheduling Using an Energy-aware Instruction Set Architecture", Proceedings of the Sixth Workshop of Languages, Compilers, and Runtime Systems for Scalable Computers (LCR '02), pp. 1-10
  • A. Sivasubramaniam, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2002, "Designing Energy-Efficient Software", Proceedings of the Next Generation Software Workshop, held in conjunction with the International Parallel and Distributed Processing Symposium (IPDPS 2002), pp. p. 176
  • D. Duarte, N. Vijaykrishnan, Mary Jane Irwin and Y.-F. Tsai, 2002, "Impact of Technology Scaling on the Clock System Power", Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), pp. 59-64
  • I. Kadayif, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2002, "Hardware-Software Co-Adaption for Data-Intensive Embedded Applications", Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), pp. 20-25
  • B. T. Kang, N. Vijaykrishnan, Mary Jane Irwin and R. Chandramouli, 2002, "Power Efficient Adaptive M-QAM Design Using Adaptive Pipelined Analog-to-Digital Converter", Proceedings of the International Conference on Acoustics, Speech and Signal Processing (ICASSP 2002). (CD ROM Proceedings)
  • G. Chen, M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and W. Wolf, 2002, "Energy Savings Through Compression in Embedded Java Environments", Proceedings of the ACM/SIGDA/SIGSOFT Tenth International Conference on Hardware/Software Codesign (CODES '02), pp. 163-168
  • H. Saputra, M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin, J. S. Hu, C.-H. Hsu and U. Kremer, 2002, "Energy-Conscious Compilation Based on Voltage Scaling", Proceedings of the ACM SIGPLAN Joint Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'02) and Software and Compilers for Embedded Systems (SCOPES'02), pp. 2-10
  • J. S. Hu, M. Kandemir, Mary Jane Irwin, N. Vijaykrishnan, H. Saputra and W. Zhang, 2002, "Compiler-Directed Cache Polymorphism", Proceedings of the ACM SIGPLAN Joint Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'02) and Software and Compilers for Embedded Systems (SCOPES'02), pp. 165-174
  • V. De La Luz, A. Sivasubramaniam, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2002, "Scheduler Based DRAM Energy Management", Proceedings of the Thirty-Ninth Design Automation Conference (DAC), pp. 697-702
  • G. Chen, M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and M. Wolczko, 2002, "Adaptive Garbage Collection for Battery-Operated Environments", Proceedings of the Second USENIX JavaTM Virtual Machine Research and Technology Symposium (JVM'02), pp. 1-12
  • D. Duarte, N. Vijaykrishnan, Mary Jane Irwin, H. S. Kim and G. McFarland, 2002, "Scaling of the Effectiveness of Power Reduction Schemes and the Impact of Temperature Management", Proceedings of the International Conference on Computer Design (ICCD 2002), pp. 382-387
  • L. Li, I. Kadayif, Y.-F. Tsai, N. Vijaykrishnan, M. Kandemir, Mary Jane Irwin and A. Sivasubramaniam, 2002, "Leakage Energy Management in Cache Hierarchies", Proceedings of the Eleventh International Conference on Parallel Architectures and Compilation Techniques (PACT 2002), pp. 131-140
  • S. Kim, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2002, "Predictive Precharging for Bitline Leakage Energy Reduction", Proceedings of the Fifteenth Annual IEEE International ASIC/SOC Conference, pp. 36-40
  • D. Duarte, N. Vijaykrishnan, Mary Jane Irwin and Y.-F. Tsai, 2002, "Impact of Technology Scaling and Packaging on Dynamic Voltage Scaling Techniques", Proceedings of the Fifteenth Annual IEEE International ASIC/SOC Conference, pp. 244-248
  • R. Ramanarayanan, N. Vijaykrishnan and Mary Jane Irwin, 2002, "Characterizing Dynamic and Leakage Power Behavior in Flip-Flops", Proceedings of the Fifteenth Annual IEEE International ASIC/SOC Conference, pp. 433-437
  • G. Esakkimuthu, N. Vijaykrishnan and Mary Jane Irwin, 2002, "An Analytical Power Estimation Model for Crossbar Interconnects", Proceedings of the Fifteenth Annual IEEE International ASIC/SOC Conference, pp. 119-123
  • J. Zhao, R. Chandramouli, N. Vijaykrishnan, Mary Jane Irwin, B. T. Kang and S. Somasundaram, 2002, "Influence of MPEG-4 Parameters on System Energy", Proceedings of the Fifteenth Annual IEEE International ASIC/SOC Conference, pp. 137-142
  • W. Xu, A. Parikh, M. Kandemir and Mary Jane Irwin, 2002, "Fine-grain Instruction Scheduling for Low Energy", Proceedings of the IEEE Workshop on Signal Processing Systems (SIPS'02), pp. 258-263
  • W. Zhang, J. Hu, V. Degalahal, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2002, "Compiler-directed instruction cache leakage optimization", Proceedings of the Thirty-Fifth Annual International Symposium on Microarchitecture (MICRO-35), pp. 208-218
  • G. Chen, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2002, "PennBench: A Benchmark Suite for Embedded Java", Proceedings of the Fifth Annual IEEE Workshop on Workload Characterization (WWC'02), pp. 71-80
  • M. Kandemir, J. Ramanujam, Mary Jane Irwin, V. Narayanan, I. Kadayif and A. Parikh, 2001, "Dynamic Management of Scratch-pad Memory Space", Proceedings of the Thirty-Eighth Design Automation Conference (DAC '01), pp. 690-695
  • V. De La Luz, M. Kandemir, N. Vijaykrishnan, A. Sivasubramaniam and Mary Jane Irwin, 2001, "DRAM Energy Management Using Software and Hardware Directed Power Mode Control", Proceedings of the Seventh International Symposium on High Performance Computer Architecture (HPCA 2001), pp. 159-169
  • D. Duarte, N. Vijaykrishnan, Mary Jane Irwin and M. Kandemir, 2001, "Formulation and Validation of an Energy Dissipation Model for the Clock Generation Circuitry and Distribution Networks", Proceedings of the Fourteenth International Conference on VLSI Design, pp. 248-253
  • A. Parikh, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2001, "VLIW Scheduling for Energy and Performance", Proceedings of IEEE Computer Society Annual Workshop on VLSI (WVLSI 2001), pp. 111-117
  • N. Vijaykrishnan, M. Kandemir, S. Kim, S. Tomar, A. Sivasubramaniam and Mary Jane Irwin, 2001, "Energy Behavior of Java Applications from the Memory Perspective", Proceedings of the Java Virtual Machine Research & Technology Symposium (JVM '01), pp. 207-220
  • R. Athavale, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2001, "Influence of Array Allocation Mechanisms on Memory System Energy", Proceedings of the Fifteenth International Parallel and Distributed Processing Symposium (IPDPS 2001), pp. p. 3
  • S. Tomar, N. Vijaykrishnan, M. Kandemir, R. Shetty and Mary Jane Irwin, 2001, "Energy Optimization Using Object Co-Location in Java", Proceedings of Java Optimization Strategies for Embedded Systems Workshop (JOSES), held in conjunction with ETAPS'01, pp. 9-15
  • I. Kadayif, T. Chinoda, M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and A. Sivasubramaniam, 2001, "vEC: Virtual Energy Counters", Proceedings of ACM SIGPLAN/SIGSOFT Workshop on Program Analysis for Software Tools and Engineering (PASTE '01), pp. 28-31
  • I. Kadayif, M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and J. Ramanujam, 2001, "Morphable Cache Architectures: Potential Benefits", Proceedings of ACM Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES 2001), pp. 128-137
  • P. Khosla, H. Schmit, Mary Jane Irwin, N. Vijaykrishnan, T. Cain, S. Levitan and D. Landis, 2001, "SoC Design Skills: Collaboration Builds a Stronger SoC Design Team", Proceedings of the 2001 International Conference on Microelectronic Systems Education (MSE 2001), pp. 42-43
  • S. Kim, N. Vijaykrishnan, M. Kandemir, A. Sivasubramaniam, Mary Jane Irwin and G. Esakkimuthu, 2001, "Power-aware Partitioned Cache Architectures", Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED '01), pp. 64-67
  • N. An, A. Sivasubramaniam, N. Vijaykrishnan, M. Kandemir, Mary Jane Irwin and S. Gurumurthi, 2001, "Analyzing Energy Behavior of Spatial Access Methods for Memory-Resident Data", Proceedings of the Twenty Seventh International Conference on Very Large Databases (VLDB 2001), pp. 411-420
  • J. Hezavei, N. Vijaykrishnan, Mary Jane Irwin, M. Kandemir and D. Duarte, 2001, "Input Sensitive High-level Power Analysis", Proceedings of the 2001 IEEE Workshop on SiGNAL Processing Systems (SiPS 2001), pp. 149-156
  • H. S. Kim, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2001, "A framework for energy estimation of VLIW architecture", Proceedings of the International Conference on Computer Design (ICCD 2001), pp. 40-45
  • S. Tomar, S. Kim, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2001, "Use of Local Memory for Efficient Java Execution", Proceedings of the International Conference on Computer Design (ICCD 2001), pp. 468-473
  • G. Thirugnanam, N. Vijaykrishnan and Mary Jane Irwin, 2001, "A Novel Low Power CAM Design", Proceedings of the Fourteenth Annual IEEE International ASIC/SOC Conference, pp. 198-202
  • D. Duarte, N. Vijaykrishnan, Mary Jane Irwin and M. Kandemir, 2001, "Evaluating the Impact of Architectural-Level Optimizations on Clock Power", Proceedings of the Fourteenth Annual IEEE International ASIC/SOC Conference, pp. 447-451
  • S. Kim, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2001, "Energy-Efficient Instruction Cache Using Page-Based Placement", Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES 2001), pp. 229-237
  • N. Kirubanandan, A. Sivasubramaniam, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2001, "Memory Energy Characterization and Optimization for the SPEC2000 Benchmarks", Proceedings of the IEEE Fourth Annual Workshop on Workload Characterization (WWC-4) (held in conjunction with MICRO-34), pp. 193-201
  • W. Zhang, N. Vijaykrishnan, M. Kandemir, Mary Jane Irwin, D. J. Duarte and Y. Tsai, 2001, "Exploiting VLIW Schedule Slacks for Dynamic and Leakage Energy Reduction", Proceedings of the Thirty-Fourth Annual International Symposium on Microarchitecture (MICRO-34), pp. 102-113
  • A. Parikh, Mary Jane Irwin, M. Kandemir, N. Vijaykrishnan and I. Kadayif, 2001, "Energy-Conscious Instruction Scheduling for VLIW Architectures", Proceedings of the Ninth Workshop on Compilers for Parallel Computers (CPC '01)
  • D. Duarte, J. Hezavei and Mary Jane Irwin, 2000, "Power Consumption and Performance Comparative Study of Logarithmic-Time CMOS Adders", Proceedings of the IEEE Workshop on Signal Processing Systems (SiPS '00), pp. 467-476
  • V. De La Luz, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2000, "Energy-Oriented Compiler Optimizations for Partitioned Memory Architectures", Proceedings of the Third International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES 2000), pp. 138-147
  • A. Parikh, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2000, "Energy-Aware Instruction Scheduling", Proceedings of the Seventh International Conference on High Performance Computing (HiPC 2000), 1970, pp. 335-344
  • J. Hezavei, N. Vijaykrishnan and Mary Jane Irwin, 2000, "A Comparative Study of Power Efficient SRAM Designs", Proceedings of GLS VLSI-2000, pp. 117-122
  • B. Bishop, Mary Jane Irwin and T. Kelliher, 2000, "SPARTA: Simulation of Physics on a Real-Time Architecture", Proceedings of GLS VLSI-2000, pp. 177-182
  • H. S. Kim, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2000, "Multiple Access Caches: Energy Implications", Proceedings of the IEEE CS Annual Workshop on VLSI (WVLSI 2000), pp. 37-42
  • A. Parikh, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2000, "Instruction Scheduling Based on Energy and Performance Constraints", Proceedings of the IEEE CS Annual Workshop on VLSI (WVLSI 2000), pp. 53-58
  • M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and W. Ye, 2000, "Influences of Compiler Optimizations on System Power", Proceedings of the Thirty-Seventh Design Automation Conference (DAC'00), pp. 304-307
  • W. Ye, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2000, "The Design and Use of SimplePower: A Cycle-Accurate Energy Estimation Tool", Proceedings of Thirty-Seventh Design Automation Conference (DAC'00), pp. 340-345
  • N. Vijaykrishnan, M. Kandemir, Mary Jane Irwin, H. S. Kim and W. Ye, 2000, "Energy-Driven Integrated Hardware-Software Optimization Using SimplePower", Proceedings of the Twenty-Seventh Annual International Symposium on Computer Architecture (ISCA-2000), pp. 95-106
  • M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and H. S. Kim, 2000, "Towards Energy Aware Iteration Space Tiling", Proceedings of ACM Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES 2000), 1985, pp. 211-215
  • G. Esakkimuthu, N. Vijaykrishnan, M. Kandemir and Mary Jane Irwin, 2000, "Memory System Energy: Influence of Hardware-Software Optimizations", Proceedings of ISLPED'2000, pp. 244-246
  • B. Bishop, T. Kelliher and Mary Jane Irwin, 2000, "Hardware/Software Co-design for Real-Time Physical Modelling", Proceedings of the IEEE International Conference on Multimedia and Expo, 3, pp. 1363-1366
  • M. Kandemir, N. Vijaykrishnan, Mary Jane Irwin and H. S. Kim, 2000, "Experimental Evaluation of Energy Behavior of Iteration Space Tiling", Proceedings of the Thirteenth Annual Workshop on Languages and Compilers for Parallel Computing (LCPC'00), 2017, pp. 142-157
  • D. Duarte, Mary Jane Irwin and N. Vijaykrishnan, 2000, "Modeling Energy of the Clock Generation and Distribution Circuitry", Proceedings of the International Conference on ASIC, pp. 261-265
  • V. Lyuboslavsky, B. Bishop, N. Vijaykrishnan and Mary Jane Irwin, 2000, "Design of Databus Charge Recovery Mechanism", Proceedings of the International Conference on ASIC, pp. 283-287
  • H. S. Kim, M. Kandemir, N. Vijaykrishnan and Mary Jane Irwin, 2000, "Characterization of Memory Energy Behavior", Proceedings of the IEEE Third Annual Workshop on Workload Characterization (WWC 2000), pp. 165-180
  • Mary Jane Irwin, M. Kandemir, N. Vijaykrishnan and A. Sivasubramaniam, 2000, "A Holistic Approach to System Level Energy Optimization", Proceedings of the Tenth International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2000), 1918, pp. 88-107
  • H. S. Kim, Mary Jane Irwin, N. Vijaykrishnan and M. Kandemir, 2000, "Effect of Compiler Optimizations on Memory Energy", Proceedings of the IEEE Workshop on Signal Processing Systems (SiPS '00), pp. 663-672

Other

  • K. Irick, T. Theocharides, N. Vijaykrishnan and Mary Jane Irwin, 2006, "Real Time Embedded Face Detection", pp. 6
  • Y.-F. Tsai, N. Vijaykrishnan and Mary Jane Irwin, 2002, "A Sizing Model for SRAM Data Preserving Sleep Transistors"
  • Mary Jane Irwin, M. Kandemir, N. Vijaykrishnan, W. Ye and I. Demirkiran, 2000, "Register Relabeling: A Post Compilation Technique for Energy Reduction"

Research Projects

Honors and Awards

  • PSU Noll Chair, Penn State University, College of Engineering, 2003 - 2018
  • 25 Years of FPL Most Influential Papers Award, International Conference on Field-programmable Logic and Applications, 2015 - 2015
  • Notable Women in Computing Playing Card Deck (the 10 of hearts), CRA-W and Anita Borg Institute, 2014 - 2014
  • Inaugural Ten-Year Retrospective Most Influential ASP-DAC Paper Award, 2012 - 2012
  • University of Illinois at Urbana-Champaign Distinguished Achievement Award, University of Illinois at Urbana-Champaign, 2011 - 2011
  • ACM-W Athena Lecturer, ACM-W, 2010 - 2011
  • ACM SIGARCH Distinguished Service Award, ACM SIGARCH, 2010 - 2010

Service

Service to Penn State:

  • Member, Engineering Faculty Scholar Medal Selection Panel, 2013 - 2016
  • Chairperson, School of EECS Academic Boot Camp for Graduate Students Organizing Committee, August 2015 - May 2016
  • Committee Member, Strategic Committee, August 2009 - July 2016
  • Co-Chairperson, Space Committee, August 2012 - July 2016
  • Committee Member, Teaching Load Committee, August 2013 - July 2014
  • Committee Member, Climate/Social Committee, August 2009 - July 2014
  • Committee Member, Curriculum/ABET Committee, August 2012 - July 2014
  • Architecture Exam LeadCSE Candidacy Exam Committee, August 2014 - December 2014
  • Committee Member, Publications Committee, August 2012 - July 2013
  • Chairperson, Penn State University Provost Search Committee, 2012 - 2013
  • Architecture Exam LeadCSE Candidacy Exam Committee, August 2012 - December 2012
  • Chairperson, Space Committee, August 2009 - July 2012
  • Chairperson, Faculty Development Committee, August 2010 - July 2012
  • Member, Preliminary Evaluation Committee for a School of Electrical Engineering and Computer Science, August 2011 - December 2011
  • Committee Member, President's Task Force to Enhance the Stature of Penn State Faculty (2011), 2011 - 2011
  • Presenter, New CSE Graduate Student Briefing, August 2011
  • Committee Member, Penn State RA-10 Investigatory Committee (2010), 2010 - 2010
  • Speaker, PSU Women in Engineering (WEP), November 2010 - November 2010
  • Architecture Exam LeadCSE Candidacy Exam Committee, August 2010 - December 2010
  • Chairperson, Teaching Issues Committee, August 2009 - July 2010
  • Committee Member, CoE Faculty Staff Campaign Committee, 2009 - 2010
  • Committee Member, Women in Engineering Advisory Committee, January 1998 - December 2008
  • , University Strategic Planning Academic Excellence Task Force (2008), January 2007 - December 2008
  • MemberEvan Pugh Professors, January 2006 - December 2006
  • Member, Women in Engineering/Minority in Engineering Progr, January 1998 - December 2006
  • , RA10 Committee, September 2002 - March 2003
  • Chairperson, University Commission for Women (CFW), January 2001 - December 2002
  • Committee Member, CFW Schraer Award Selection Committee, January 2001 - December 2002
  • , CFW, August 2000 - July 2001
  • Chairperson, Commission for Women (CFW), January 1999 - December 2000
  • , CFW, August 1999 - July 2000
  • Committee Member, Penn State X-Club, 2005
  • Member, WEP Senior Women Faculty Leadership Team, 2005

Service to External Organizations:

  • Member, NAE Membership Policy Committee, 2010 - 2016
  • Member, IEEE Maxwell Award Selection Committee, 2014 - 2016
  • Member, Association for Computing Machinery CEO Selection Team, 2015 - 2015
  • Program Committee MemberIEEE/ACM International Symposium on Microarchitecture (MICRO), August 2014 - December 2014
  • Program Committee MemberACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2014), October 2013 - March 2014
  • Member, Design Automation Conference Marie Pistilli Achievements in EDA Award Selection Committee, 2006 - 2014
  • Member, Anita Borg Institute, ABIE Technical Leadership Award Selection Committee, 2011 - 2014
  • Member, ACM/SIGARCH 2013 Wilkes Award Selection Committee, 2013 - 2013
  • Member, ACM Fellow Selection Committee, 2008 - 2013
  • Member, NAE Committee on Membership (CoM), 2010 - 2013
  • Program Committee MemberInternational Conference on Parallel Processing (ICPP’13), June 2013 - October 2013
  • Program Committee MemberACM/IEEE International Symposium on Computer Architecture (ISCA’13), March 2013 - June 2013
  • Member, Anita Borg Institute (ABI) Anita Borg Award Selection Committee, 2008 - 2012
  • Steering Committee MemberACM SIGARCH/SIGPLAN/SIGOPS International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2009 - 2012
  • Steering Committee MemberACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems (LCTES), 2004 - 2011
  • Program Committee MemberTwenty-Fifth ACM SIGARCH International Conference on Supercomputing (ICS 2011), February 2011 - June 2011
  • Member, Steering Committee and Board, CRA Committee on the Status of Women in CS&E (CRA-W), 1991 - 2011
  • Program Committee MemberTwenty-Fifth IEEE International Parallel & Distributed Processing Symposium (IPDPS 2011), 2010 - May 2011
  • Member, Fritz J. and Dolores H. NAE Russ Prize Committee, 2006 - 2011
  • Member, CRA Distinguished Service Award Selection Committee, 2010 - 2010
  • Program Committee MemberForty-Third International Symposium on Microarchitecture (MICRO-43), August 2010 - December 2010
  • Executive Committee MemberIEEE/ACM SIGDA International Symposium on Low Power Electronics and Design (ISLPED), 2003 - 2010
  • Program Committee MemberNineteenth IEEE/ACM SIGARCH International Conference on Parallel Architectures and Compilation Techniques (PACT 2010), May 2010 - September 2010
  • Program Committee MemberFifth International Conference on High Performance and Embedded Architectures and Compilers (HiPEAC 2010), September 2009 - January 2010
  • Member, CRA Government Affairs Committee, 2005
 


 

About

The School of Electrical Engineering and Computer Science was created in the spring of 2015 to allow greater access to courses offered by both departments for undergraduate and graduate students in exciting collaborative research in fields.

We offer B.S. degrees in electrical engineering, computer science, computer engineering and data science and graduate degrees (master's degrees and Ph.D.'s) in electrical engineering and computer science and engineering. EECS focuses on the convergence of technologies and disciplines to meet today’s industrial demands.

School of Electrical Engineering and Computer Science

The Pennsylvania State University

209 Electrical Engineering West

University Park, PA 16802

814-863-6740

Department of Computer Science and Engineering

814-865-9505

Department of Electrical Engineering

814-865-7667