Photo of Sumeet Gupta

Sumeet Gupta

Monkowski Assistant Professor

Affiliation(s):

  • School of Electrical Engineering and Computer Science
  • Electrical Engineering

111K Electrical Engineering West

skg157@psu.edu

814-867-4776

Research Areas:

Electronic Materials and Devices

Interest Areas:

Exploration of novel devices and circuits for low-power high performance variation-aware VLSI design in Si and non-Si technologies, with an emphasis on co-design between different levels of abstraction; device-circuit modeling of emerging and exploratory technologies, including charge- and spin-based logic and memories.

 
 

 

Education

  • Bachelor of Technology (B. Tech.), Electrical Engineering, Indian Institute of Technology (IIT) Delhi, 2006
  • MS, Electrical and Computer Engineering, Purdue University, 2008
  • Ph D, Electrical and Computer Engineering, Purdue University, 2012

Publications

Book, Chapters

  • Sumeet Gupta and Kaushik Roy, 2015, Low Power Robust FinFET-Based SRAM Design in Scaled Technologies, Springer New York, pp. 223–253
  • V Venkataraman, Sumeet Gupta, MJ Kumar and HS Nalwa, 2011, Laser Processing of Materials in Nanotechnology, American Scientific Publishers, pp. 25

Journal Articles

  • Shreya Gupta*, Mark Steiner*, Ahmedullah Aziz*, Vijaykrishnan Narayanan, Suman Datta and Sumeet Gupta, 2017, "Device-Circuit Analysis of Ferroelectric FETs for Low-Power Logic", IEEE Transactions on Electron Devices, 64, (8)
  • Xueqing Li, John Sampson, Asif Khan, Kaisheng Ma, Sumitha George*, Ahmedullah Aziz*, Sumeet Gupta, Saeef Salahuddin, Marvin F Change, Suman Datta and Vijaykrishnan Narayanan, 2017, "Enabling Energy-Efficient Nonvolatile Computing With Negative Capacitance FET", IEEE Transactions on Electron Devices, (64)
  • Xueqing Li, Kaisheng Ma, Sumitha George*, W -S Khwa, John Sampson, Sumeet Gupta, Y Liu, Marvin F Chang, Suman Datta and Vijaykrishnan Narayanan, 2017, "Design of Nonvolatile SRAM with Ferroelectric FETs for Energy-Efficient Backup and Restore", IEEE Transactions on Electron Devices, 64, (7)
  • Ahmedullah Aziz*, Nikhil Shukla, Suman Datta and Sumeet Gupta, 2017, "Steep Switching Hybrid Phase Transition FETs (Hyper-FET) for Low Power Applications: A Device-Circuit Co-design Perspective: Part II", IEEE Transactions on Electron Devices
  • Ahmedullah Aziz*, Nikhil Shukla, Suman Datta and Sumeet Gupta, 2017, "Steep Switching Hybrid Phase Transition FETs (Hyper-FET) for Low Power Applications: A Device-Circuit Co-design Perspective: Part I", IEEE Transactions on Electron Devices
  • Xueqing Li, Sumitha George*, Kaisheng Ma, W -Yu Tsai, Ahmedullah Aziz*, John Sampson, Sumeet Gupta, Marvin Chang, Yongpan Liu, Suman Datta and Vijaykrishnan Narayanan, 2017, "Advancing Nonvolatile Computing With Nonvolatile NCFET Latches and Flip-Flops", IEEE Transactions on Circuits and Systems I: Regular Papers
  • Ahmedullah Aziz*, Nicholas Jao*, Suman Datta and Sumeet Gupta, 2016, "Analysis of Functional Oxide based Selectors for Cross-Point Memories", IEEE Transactions on Circuits and Systems - I, 63, (12)
  • Srivatsa Srinivasa*, Ahmedullah Aziz*, Nikhil Shukla, Xueqing Li, John Sampson, Suman Datta, Jaydeep Kulkarni, Vijaykrishnan Narayanan and Sumeet Gupta, 2016, "Correlated Material Enhanced SRAMs with Robust Low Power Operation", IEEE Transactions on Electron Devices, 63, (12)
  • Moon S Kim, William Cane-Wissing*, Xueqing Li, John Sampson, Suman Datta, Sumeet Gupta and Vijaykrishnan Narayanan, 2016, "Comparative Area and Parasitics Analysis in FinFET and Heterojunction Vertical TFET Standard Cells", Journal on Emerging Technologies in Computing Systems, 121, (4)
  • Ahmedullah Aziz*, Swapnadip Ghosh, Suman Datta and Sumeet Gupta, 2016, "Physics-Based Circuit-Compatible SPICE Model for Ferroelectric Transistors", IEEE Electron Device Letters, 37, (6)
  • Ahmedullah Aziz* and Sumeet Gupta, 2016, "Hybrid Multiplexing (HYM) for Read- and Area- Optimized MRAMs with Separate Read-Write Paths", IEEE Transactions on Nanotechnology, 15, (3)
  • Nikhil Shukla, A V Thathachary, A Agrawal, H Paik, Ahmedullah Aziz*, D G Schlom, Sumeet Gupta, R E Herbert and S Datta, 2015, "A steep slope transistor based on abrupt electronic phase transition", Nature Communication
  • W-S Cho, Sumeet Gupta and Kaushik Roy, 2014, "Device-Circuit Analysis of Double-Gate MOSFETs and Schottky-Barrier FETs: A Comparison Study for Sub-10-nm Technologies", IEEE Transactions on Electron Devices, 61, (12)
  • Sri Harsha Choday, Sumeet Gupta and Kaushik Roy, 2014, "Write-Optimized STT-MRAM Bit-Cells Using Asymmetrically Doped Transistors", IEEE Electron Device Letters, 35, (11), pp. 1100–1102
  • Sumeet Gupta and Kaushik Roy, 2013, "(Invited) Spacer Thickness Optimization for FinFET-based Logic and Memories: A Device-Circuit Co-Design Approach", ECS Transactions, 50, (4), pp. 187–192
  • Sumeet Gupta and Kaushik Roy, 2013, "Device-Circuit Co-Optimization for Robust Design of FinFET-Based SRAMs", Design & Test, IEEE, 30, (6), pp. 29–39
  • Niladri N Mojumder, Xuanyao Fong, Charles Augustine, Sumeet Gupta, Sri Harsha Choday and Kaushik Roy, 2013, "Dual pillar spin-transfer torque MRAMs for low power applications", ACM Journal on Emerging Technologies in Computing Systems (JETC), 9, (2), pp. 14
  • Sumeet Gupta, Jaydeep P Kulkarni and Kaushik Roy, 2013, "Tri-mode independent gate FinFET-based SRAM with pass-gate feedback: technology–circuit co-design for enhanced cell stability", Electron Devices, IEEE Transactions on, 60, (11), pp. 3696–3704
  • Sumeet Gupta, Jaydeep P Kulkarni, Suman Datta and Kaushik Roy, 2012, "Heterojunction intra-band tunnel FETs for low-voltage SRAMs", Electron Devices, IEEE Transactions on, 59, (12), pp. 3533–3542
  • Mrigank Sharad, Sumeet Gupta, Shriram Raghunathan, Pedro P Irazoqui and Kaushik Roy, 2012, "Low-Power Architecture for Epileptic Seizure Detection Based on Reduced Complexity DWT", ACM Journal on Emerging Technologies in Computing Systems (JETC), 8, (2), pp. 10
  • Sumeet Gupta, Georgios Panagopoulos and Kaushik Roy, 2012, "NBTI in n-Type SOI Access FinFETs in SRAMs and Its Impact on Cell Stability and Performance", Electron Devices, IEEE Transactions on, 59, (10), pp. 2603–2609
  • Niladri Narayan Mojumder, Sumeet Gupta, Sri Harsha Choday, Dmitri E Nikonov and Kaushik Roy, 2011, "A three-terminal dual-pillar STT-MRAM for high-performance robust memory applications", Electron Devices, IEEE Transactions on, 58, (5), pp. 1508–1516
  • Ashish Goel, Sumeet Gupta and Kaushik Roy, 2011, "Asymmetric drain spacer extension (ADSE) FinFETs for low-power and robust SRAMs", Electron Devices, IEEE Transactions on, 58, (2), pp. 296–308
  • Farshad Moradi, Sumeet Gupta, Georgios Panagopoulos, Dag T Wisland, Hamid Mahmoodi and Kaushik Roy, 2011, "Asymmetrically doped FinFETs for low-power robust SRAMs", Electron Devices, IEEE Transactions on, 58, (12), pp. 4241–4249
  • Sumeet Gupta, Sang Phill Park and Kaushik Roy, 2011, "Tri-mode independent-gate FinFETs for dynamic voltage/frequency scalable 6T SRAMs", Electron Devices, IEEE Transactions on, 58, (11), pp. 3837–3846
  • Shriram Raghunathan, Sumeet Gupta, Himanshu S Markandeya, Pedro P Irazoqui and Kaushik Roy, 2011, "Ultra low-power algorithm design for implantable devices: Application to epilepsy prostheses", Journal of Low Power Electronics and Applications, 1, (1), pp. 175–203
  • Shriram Raghunathan, Sumeet Gupta, Himanshu S Markandeya, Kaushik Roy and Pedro P Irazoqui, 2010, "A hardware-algorithm co-design approach to optimize seizure detection algorithms for implantable applications", Journal of neuroscience methods, 193, (1), pp. 106–117
  • Sumeet Gupta, Arijit Raychowdhury and Kaushik Roy, 2010, "Digital computation in subthreshold region for ultralow-power operation: A device–circuit–architecture codesign perspective", Proceedings of the IEEE, 98, (2), pp. 160–190
  • Sumeet Gupta, Arijit Raychowdhury and Kaushik Roy, 2009, "Compact models considering incomplete voltage swing in complementary metal oxide semiconductor circuits at ultralow voltages: A circuit perspective on limits of switching energy", Journal of Applied Physics, 105, (9), pp. 094901
  • Shriram Raghunathan, Sumeet Gupta, Matthew P Ward, Robert M Worth, Kaushik Roy and Pedro P Irazoqui, 2009, "The design and hardware implementation of a low-power real-time seizure detection algorithm", Journal of neural engineering, 6, (5), pp. 056005
  • M Jagadesh Kumar, Vivek Venkataraman and Sumeet Gupta, 2006, "A new grounded lamination gate (GLG) for diminished fringe-capacitance effects in high-/spl kappa/gate-dielectric MOSFETs", Electron Devices, IEEE Transactions on, 53, (10), pp. 2578–2581
  • M Jagadesh Kumar, Sumeet Gupta and Vivek Venkataraman, 2006, "Compact modeling of the effects of parasitic internal fringe capacitance on the threshold voltage of high-k gate-dielectric nanoscale SOI MOSFETs", Electron Devices, IEEE Transactions on, 53, (4), pp. 706–711
  • M Jagadesh Kumar, Vivek Venkataraman and Sumeet Gupta, 2005, "On the Parasitic Gate Capacitance of Small-Geometry MOSFETs", IEEE Transactions on Electron Devices, 52, (7), pp. 1677

Conference Proceedings

  • Ahmedullah Aziz*, Nicholas Jao*, Suman Datta, Vijaykrishnan Narayanan and Sumeet Gupta, 2017, "A Computationally Efficient Compact Model for Leakage in Cross-point Array"
  • Ahmedullah Aziz*, Xueqing Li, Nikhil Shukla, Suman Datta, Marvin F Chang, Vijaykrishnan Narayanan and Sumeet Gupta, 2017, "Exploiting Phase Transition Materials for Power- & Area-Efficient Sense Amplifiers"
  • Ahmedullah Aziz* and Sumeet Gupta, 2017, "Read-Enhanced Spin Memories Augmented by Phase Transition Materials"
  • Srivatsa Srinivasa*, K Mohan, W -H Chen, K -H Hsu, X Li, Marvin F Chang, Sumeet Gupta, John Sampson and Vijaykrishnan Narayanan, 2017, "Improving FPGA Design With Monolithic 3D Integration using High Density Inter-Stack Via"
  • Pankaj Sharma, J Zhang, Atanu K Saha*, Sumeet Gupta and Suman Datta, 2017, "Negative Capacitance Transients in Metal-Ferroelectric Hf0.5Zr0.5O2-Insulator-Semiconductor (MFIS) Capacitors"
  • Pankaj Sharma, K Tapily, Atanu K Saha*, J. Zhang, A. Shaughnessy, Ahmedullah Aziz*, G. L. Snider, Sumeet Gupta, R. D. Clark and Suman Datta, 2017, "Impact of Total and Partial Dipole Switching on the Switching Slope of Gate-Last Negative Capacitance FETs with Ferroelectric Hafnium Zirconium Oxide Gate Stack"
  • Suman Datta, Alan Seabaugh, Michael Nimier, Arijit Raychowdhury, Darrel Schlom, Debdeep Jena, Grace Xing, H. -S Philip Wong, Eric Pop, Sayeef Salahuddin, Sumeet Gupta and Supratik Guha, 2017, "In Quest of the Next Information Processing Substrate"
  • Ahmedullah Aziz*, Xueqing Li, Nikhil Shukla, Suman Datta, Vijaykrishnan Narayanan and Sumeet Gupta, 2017, "Low Power Current Sense Amplifier based on Phase Transition Material"
  • Sumeet Gupta, Danni Wang*, Sumitha George*, Ahmedullah Aziz*, Xueqing Li, Suman Datta and Vijaykrishnan Narayanan, 2017, "Harnessing Ferroelectrics for Non-volatile Memories and Logic (Invited)"
  • N Shukla, B Grisafe, R K Ghosh, Nicholas Jao*, Ahmedullah Aziz*, J Frougier, Matt Jerry, S Sonde, S Rouvimov, T Orlova, S Guha, Sumeet Gupta and Suman Datta, 2016, "Ag/HfO2 based Threshold Switch with Extreme Non-Linearity for Unipolar Cross-Point Memory and Steep-slope Phase-FETs"
  • X Yin, A Aziz*, J Nahas, Suman Datta, Sumeet Gupta, M Nimier and X S Hu, 2016, "Exploiting Ferroelectric FETs for Low-Power Non-Volatile Logic-in-Memory Circuits"
  • Danni Wang*, Sumitha George*, Ahmedullah Aziz*, Suman Datta, Vijaykrishnan Narayanan and Sumeet Gupta, 2016, "Ferroelectric Transistor based Non-volatile Flip-flop"
  • Sumitha George*, Ahmedullah Aziz*, Xueqing Li, Moon Kim, John Sampson, Suman Datta, Sumeet Gupta and Vijaykrishnan Narayanan, 2016, "Device Circuit Co-Design of FEFET Based Logic for Low Voltage Processors"
  • Julien Frougier, Nikhil Shukla, Ahmedullah Aziz*, Matthew Jerry, D Deng, L Liu, G Lavellee, Theresa S Mayer, Sumeet Gupta and Suman Datta, 2016, "Phase-transition-FET Exhibiting Steep Switching Slope of 8mV/decade and 36% Enhanced ON Current"
  • Sumitha George*, Kaisheng Ma, Ahmedullah Aziz*, Xueqing Li, John Sampson, Asif Khan, Sayeef Salahuddin, Meng-Fan Chang, Suman Datta, Sumeet Gupta and Vijaykrishnan Narayanan, 2016, "Nonvolatile Memory Design Based on Ferroelectric FETs"
  • Ahmedullah Aziz*, Sumeet Gupta and Suman Datta, 2016, "Polarization Charge and Coercive Field Dependent Performance of Negative Capacitance FETs"
  • Sumeet Gupta, Ahmedullah Aziz*, Nikhil Shukla and Suman Datta, 2016, "On the Potential of Correlated Materials in the Design of Spin-Based Cross-Point Memories (Invited)"
  • Ahmedullah Aziz*, Nikhil Shukla, Suman Datta and Sumeet Gupta, 2015, "Implication of hysteretic selector device on the biasing scheme of a cross-point memory array", pp. 425–428
  • Sumitha George*, Ahmedullah Aziz*, Xuexing Li, John Sampson, Suman Datta, Sumeet Gupta and Vijaykrishnan Narayanan, 2015, "NCFET Based Logic for Energy Harvesting Systems"
  • Moon Seok Kim, William Cane-Wissing*, John Sampson, Suman Datta, Vijaykrishnan Narayanan and Sumeet Gupta, 2015, "Comparing energy, area, delay tradeoffs in going vertical with CMOS and asymmetric HTFETs", pp. 303–308
  • Ahmedullah Aziz*, William Cane-Wissing*, Moon S Kim, Suman Datta, Vijaykrishnan Narayanan and Sumeet Gupta, 2015, "Single-Ended and Differential MRAMs Based on Spin Hall Effect: A Layout-Aware Design Perspective (Invited)", pp. 333–338
  • Ahmedullah Aziz*, Nikhil Shukla, Suman Datta and Sumeet Gupta, 2015, "COAST: Correlated Material Assisted STT MRAMs for Optimized Read Operation"
  • Ahmedullah Aziz*, Nikhil Shukla, Suman Datta and Sumeet Gupta, 2015, "Read optimized MRAM with separate read-write paths based on concerted operation of magnetic tunnel junction with correlated material", pp. 43–44
  • Kaisheng Ma, Nandhini Chandramoorthy, Xueqing Li, Sumeet Gupta, John Sampson, Yuan Xie and Vijaykrishnan Narayanan, 2015, "Using Multiple-Input NEMS for Parallel A/D Conversion and Image Processing", pp. 339–344
  • Unsuk Heo, Xueqing Li, Huichu Liu, Sumeet Gupta, Suman Datta and Vijaykrishnan Narayanan, 2015, "A High-Efficiency Switched-Capacitance HTFET Charge Pump for Low-Input-Voltage Applications", pp. 304–309
  • Kaisheng Ma, Huichu Liu, Yang Xiao, Yang Zheng, Xueqing Li, Sumeet Gupta, Yuan Xie and Vijaykrishnan Narayanan, 2014, "Independently-controlled-gate finfet 6t sram cell design for leakage current reduction and enhanced read access speed", pp. 296–301
  • Suman Datta, Rahul Pandey, Ashish Agrawal, Sumeet Gupta and R Arghavani, 2014, "Impact of Contact and Local Interconnect Scaling on Logic Performance"
  • Goud, A Arun, Sumeet Gupta, Sri Harsha Choday and Kaushik Roy, 2013, "Atomistic tight-binding based evaluation of impact of gate underlap on source to drain tunneling in 5 nm gate length Si FinFETs", pp. 51–52
  • Sumeet Gupta, Woo-Suhl Cho, Goud, A Arun, Karthik Yogendra and Kaushik Roy, 2013, "Design space exploration of FinFETs in sub-10nm technologies for energy-efficient near-threshold circuits", pp. 117–118
  • Sumeet Gupta, JP Kulkarni, Suman Datta and K Roy, 2012, "Dopant Straggle-Free Heterojunction intra-band tunnel (HIBT) FETs with low drain-induced barrier lowering/thinning (DIBL/T) and reduced variation in OFF current", pp. 55–56
  • Sang Phill Park, Sumeet Gupta, Niladri Mojumder, Anand Raghunathan and Kaushik Roy, 2012, "Future cache design using STT MRAMs for improved energy efficiency: devices, circuits and architecture", pp. 492–497
  • Dongsoo Lee, Sumeet Gupta and Kaushik Roy, 2012, "High-performance low-energy STT MRAM based on balanced write scheme", pp. 9–14
  • Sumeet Gupta, Sang Phill Park, Niladri Narayan Mojumder and Kaushik Roy, 2012, "Layout-aware optimization of STT MRAMs", pp. 1455–1458
  • Yusung Kim, Sumeet Gupta, Sang Phill Park, Georgios Panagopoulos and Kaushik Roy, 2012, "Write-optimized reliable design of STT MRAM", pp. 3–8
  • Sumeet Gupta and Kaushik Roy, 2012, "Device-Circuit Co-design of FinFETs in Scaled Technologies", Meeting Abstracts, The Electrochemical Society, (31), pp. 2595–2595
  • M Sharad, Sumeet Gupta, S Raghunathan, P Irazoqui and Kaushik Roy, 2011, "Ultra Low Power, LPF-Only DWT Architecture for an Epileptic Seizure Prosthesis Implant"
  • Saurabh Dighe, Sumeet Gupta, Vivek De, Sriram Vangal, Nitin Borkar, Shekhar Borkar and Kaushik Roy, 2011, "A 45nm 48-core IA processor with variation-aware scheduling and optimal core mapping", pp. 250–251
  • Niladri N Mojumder, Sumeet Gupta and Kaushik Roy, 2011, "Dual Pillar Spin Transfer Torque MRAM with tilted magnetic anisotropy for fast and error-free switching and near-disturb-free read operations", pp. 67–68
  • Sumeet Gupta, Sri Harsha Choday and Kaushik Roy, 2011, "Exploration of device-circuit interactions in FinFET-based memories for sub-15nm technologies using a mixed mode quantum simulation framework: Atoms to systems", pp. 32–5
  • Xuanyao Fong, Sumeet Gupta, Niladri N Mojumder, Sri Harsha Choday, Charles Augustine and Kaushik Roy, 2011, "KNACK: A hybrid spin-charge mixed-mode simulator for evaluating different genres of spin-transfer torque MRAM bit-cells", pp. 51–54
  • Shriram Raghunathan, Sumeet Gupta, H Markandeya, K Roy and PP Irazoqui, 2009, "Co-Design of Hardware and Software to optimize Seizure Detection Algorithms towards a closed-loop Epilepsy Prosthesis", 50, pp. 396–396
  • Kaushik Roy, Jaydeep P Kulkarni and Sumeet Gupta, 2009, "Device/circuit interactions at 22nm technology node", pp. 97–102
  • Ashish Goel, Sumeet Gupta, Aditya Bansal, Meng-Hsueh Chiang and Kaushik Roy, 2009, "Double-gate MOSFETs with aymmetric drain underlap: A device-circuit co-design and optimization perspective for SRAM", pp. 57–58
  • S Raghunathan, Sumeet Gupta, K Roy and P Irazoqui, 2009, "An implantable ultra-low power digital circuit implementation of a seizure detection algorithm"
  • M J Kumar, V Venkataraman and Sumeet Gupta, 2006, "A New Grounded Lamination Gate (GLG) SOI MOSFET for Diminished Fringe Capacitance Effects"
  • M J Kumar, V Venkataraman and Sumeet Gupta, 2005, "Compact Modeling of Parasitic Internal Fringe Capacitance and its effect on the Threshold Voltage of High-K Gate Dielectric SOI MOSFETs"

Other

  • Sumeet Gupta, 2012, "Technology-circuit co-design and analysis of nano-scale multi-gate fets for memory applications"

Research Projects

  • July 2017 - June 2020, "SHF: Small: Ferroelectric Transistor based Coupled Oscillators for Non-Boolean Computing," (Sponsor: NSF).
  • October 2016 - October 2019, "Title: E2CDA: Type II: 2D Electrostrictive FETs for Ultra-Low Power Circuits and Architectures," (Sponsor: NSF).
  • September 2016 - September 2018, "Ultra-Low Power Non-Volatile Processors Enabled by Ferroelectric Transistors," (Sponsor: DARPA Young Faculty Award).
  • January 2016 - December 2018, "Ferroelectric Field Effect Transistor with Steep Switching Slope and Non-Volatile Functionality," (Sponsor: Semiconductor Research Corporation - Global Research Corporation (through the University of Notre Dame)).
  • December 2015 - November 2017, "Orbital Ordering Driven Threshold Switches for Select Devices in 3D X-Point Memories," (Sponsor: Semiconductor Research Corporation/DARPA - StarNET/LEAST center (through University of Notre Dame)).

Honors and Awards

  • DARPA Young Faculty Award, DARPA, September 2016 - September 2018
  • Monkowski Career Development Professorship in EE, Department of Electrical Engineering, Penn State University, July 2014 - June 2017
  • 6th TSMC Outstanding Student Research Bronze Award, Taiwan Semiconductor Manufacturing Corporation, September 2012
  • Intel Ph.D. Fellowship, Intel Corporation, August 2009 - August 2010
  • Certificate of Recognition, Intel Corporation, September 2010
  • Outstanding Teaching Assistant Award, Office of the Provost, Purdue University, April 2007 - April 2007
  • Magoon Award, College of Engineering, Purdue University, April 2007 - April 2007

Service

Service to Penn State:

  • Committee Member, Undergraduate Committee, January 2016 - July 2017
  • Committee Member, Faculty search committee for the area of Devices, Circuits and Sensors, September 2016 - June 2017
  • Reviewer, March 2016 - April 2016
  • Committee Member, Faculty search committee for the area of Devices, Circuits, Sensors and Computer Architecture, December 2015 - September 2016
  • Committee Member, Adhoc Committee for Rethinking EE, CE, and CS undergraduate degrees., December 2015 - December 2015
  • Committee Member, Undergraduate Committee, January 2015 - December 2015
  • Member, Undergraduate Committee, August 2014 - December 2014
  • Committee Member, Graduate Committee, August 2017
  • Committee Member, College of Engineering Research Computing Committee, September 2016

Service to External Organizations:

  • Chairperson, Chair for Low Power VLSI track for GLSVLSI 2017, October 2016 - March 2017
  • Committee Member, Technical Program Committee Member in Design Automation Conference, December 2016 - February 2017
  • Organizer, Organizer of the Special Session on Design Opportunities and Challenges in Non-Volatile Technologie in ISQED 2017, December 2016 - March 2017
  • , Technical Program Committee Member in International Symposium of Low Power Electronics and Design, March 2016 - May 2016
  • Committee Member, Technical Program Committee Member in Great Lakes Symposium on VLSI Design, January 2016 - March 2016
  • Committee Member, Technical Program Committee Member in VLSI DAT, September 2016 - December 2016
  • Committee Member, Committee Member for DAC PhD Forum, March 2016 - May 2016
  • Committee Member, Technical Program Committee for IEEE SOI-3D-Subthreshold (S3S) Microelectronics Technology Unified Conference, April 2016 - June 2016
  • Committee Member, Technical Program Committee on International Symposium on Low Power Electronic Design (ISLPED), March 2016 - May 2016
  • Organizer, Organizer of the Special Session on Emerging Non-Volatile Memories in IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2015, February 2015 - July 2015
  • Chairperson, Chairperson for a special session on Energy Autonomous and Wearable Electronics in Design Automation Conference 2015, April 2015 - June 2015
  • Member, IEEE International Symposium on Low Power Electronic Design, Technical Program Committee, March 2015 - May 2015
  • Committee Member, Technical Program Committee for IEEE SOI-3D-Subthreshold (S3S) Microelectronics Technology Unified Conference, Sub-threshold Committee, May 2015 - June 2015
  • Member, IEEE S3S Conference 2014, Technical Program Committee, May 2014 - June 2014
  • Member, VLSI Design Conference 2014, Technical Program Committee, August 2013 - September 2013
 


 

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The School of Electrical Engineering and Computer Science was created in the spring of 2015 to allow greater access to courses offered by both departments for undergraduate and graduate students in exciting collaborative research in fields.

We offer B.S. degrees in electrical engineering, computer science, computer engineering and data science and graduate degrees (master's degrees and Ph.D.'s) in electrical engineering and computer science and engineering. EECS focuses on the convergence of technologies and disciplines to meet today’s industrial demands.

School of Electrical Engineering and Computer Science

The Pennsylvania State University

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814-863-6740

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